• 专利附录
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    • 专利摘要:
    For example, a display element (1) formed by an organic EL element and a control element formed by a MOS transistor (2) are connected in series between a driving line (6) to be driven with a voltage or a current and a ground. A gate of the MOS transistor (2) is connected to a control line (7) through a nonvolatile data holding section such as a ferroelectric capacitor (3), and control data of the MOS transistor (2) can be held in a floating state. As a result, the ON/OFF data of each pixel are held in the floating state, and display data are rewritten to only a pixel to be changed in a display state of ON/OFF or the like and held data are displayed on a pixel which is not changed in the display data. Consequently, it is possible to obtain a nonvolatile display device capable of reducing power consumption and operating with a small battery.
    公开号:US20010007447A1
    申请号:US09/757,491
    申请日:2001-01-11
    公开日:2001-07-12
    发明作者:Haruo Tanaka；Takashi Nakamura
    申请人:Rohm Co Ltd；
    IPC主号:G09G3-3258
    专利说明:
    [0001] The present invention relates to a nonvolatile display device capable of exactly maintaining a display state without applying data to a pixel (dot) in the same display state when forming the pixel in a matrix and sequentially displaying an image or a video such as a dynamic image which is obtained by a computer, and a method of driving the display device. More specifically, the present invention relates to a nonvolatile display device having a nonvolatile data holding section provided on a control element for controlling ON/OFF of each pixel, and a method of driving the display device. [0001] BACKGROUND OF THE INVENTION
    [0002] Conventionally, a cathode ray tube or a liquid crystal has been used in a display of a computer or the like, and a light emitting diode (LED) or a liquid crystal has been used in a large display on the street, in which a light emitting section is formed in a matrix to constitute each pixel and a displayed image is sequentially changed by turning ON/OFF the pixel. [0002]
    [0003] In the display using the liquid crystal, each pixel is constituted by an indicating section [0003] 51 and a thin film MOSFET 52 to be a switching element (control element) as shown in an equivalent circuit diagram of FIG. 12, for example. Gates of the MOSFETs 52 which are arranged in a row direction are connected to a scanning line X and sequentially scanned through scanning lines X1, X2, X3 . . . , and drains of the MOSFETs 52 which are arranged in a column direction are connected to one of data lines Y1, Y2, Y3 . . . . Thus, each pixel is driven by their combination. The reference numeral 53 denotes an auxiliary capacitor for holding a voltage to be applied until the next scan for line-sequential scan.
    [0004] A liquid crystal layer is a kind of capacitor, and holds the applied voltage to some extent but cannot hold the same voltage until the next scan for the line-sequential scan through discharge thereof. Therefore, the auxiliary capacitor [0004] 53 is provided in some cases. Even this auxiliary capacitor can hold a voltage only until the next scan, and should always apply data even if data for ON/OFF are the same. Also in the case in which another light emitting element such as an LED is used, this phenomenon is generated in the same manner. Particularly, it is necessary to rewrite approximately 60 times per second in the case in which a dynamic image is to be displayed.
    [0005] As described above, in the conventional display device, the data for turning ON/OFF each pixel to display an image should be always applied every constant time even if the ON/OFF of the pixel is not changed. In the case in which a dynamic image is to be displayed, particularly, the data should be updated at a rate of approximately {fraction (1/60)} sec. Even if the data to be updated are almost the same, all the data should be applied to each pixel at each time. So, great power is consumed for rewriting the data. Although it is necessary to drive by a small battery in a very small portable head mounted display such as a microdisplay or the like, the size of the battery should be increased by the consumption of the great power. Therefore, practical use has become a problem. [0005] SUMMARY OF THE INVENTION
    [0006] In order to solve such a problem, it is an object of the present invention to provide a nonvolatile display device capable of holding data for ON/OFF of each pixel in a floating state, rewriting display data for only a pixel changing the display state of ON/OFF or the like, and displaying by the held data for a pixel which does not change the display data, thereby reducing power consumption and operating with a small battery. [0006]
    [0007] It is another object of the present invention to provide a specific structure when a ferroelectric capacitor is used as a nonvolatile data holding section. [0007]
    [0008] It is still another object of the present invention to provide a method of driving a nonvolatile display device capable of applying new data to only a pixel changing the display state without applying display data to each pixel at any time, thereby reducing power consumption when the display device is to be driven. [0008]
    [0009] The present invention provides a nonvolatile display device comprising; a display element, a control element for controlling a voltage or a current to be applied to the display element to drive the display element, and a nonvolatile data holding section integrated with the control element or connected to the control element and capable of holding control data of the control element in a floating state. [0009]
    [0010] The control element implies an element for controlling the display, for example, a driving transistor capable of feeding a current if the display element is an element to be driven with a current such as an organic EL element or an LED, or a switching element for turning ON/OFF by the application of a voltage if the display element is an element to be driven with a voltage such as a liquid crystal. Moreover, the display element implies one light emitting element or one pixel portion of a liquid crystal panel which can constitute one pixel. [0010]
    [0011] With such a structure, a nonvolatile data holding section is provided. Therefore, in the case in which data in the display state of a certain pixel are the same, it is not necessary to rewrite the data and it is sufficient that data for only a pixel changing data on the display state are rewritten. As a result, the number of pixels to be rewritten is greatly reduced so that power consumption for rewriting is reduced. Thus, the power consumption of the display device itself can be reduced considerably. [0011]
    [0012] The control element is formed of a MOS transistor type element, one of a drain and a source of the element is connected to the display element and the other is connected to a driving line, a gate side of the MOS transistor type element is connected to a control line through the nonvolatile data holding section, and plural sets of the display element, the control element and the nonvolatile data holding section are formed as each pixel in a matrix. Consequently, the display can be constituted in a matrix by utilizing the nonvolatile data holding section of a semiconductor storage device type, and the display of each pixel can be controlled by a combination in row and column directions. [0012]
    [0013] The MOS transistor element implies a MOSFET as well as a modified transistor such as an MFT or MFIT structure having a ferroelectric layer provided in place of a gate oxide film or together with the gate oxide film on the gate side. [0013]
    [0014] A selective transistor is connected between the nonvolatile data holding section and the control line and a gate of the selective transistor is connected to a selective line. Consequently, the nonvolatile data holding sections of individual pixels can hold intermediate data other than 0 and 1 and gradation display can also be carried out. [0014]
    [0015] If the nonvolatile data holding section is formed of a ferroelectric capacitor, a data writing speed is increased and a writing lifetime is long, that is, 10[0015] 12 times or more, which is very suitable for making the display device nonvolatile.
    [0016] The control element and the nonvolatile data holding section are formed of a transistor having an MFS structure or an MFIS structure in which a ferroelectric capacitor is formed integrally on the gate side of the MOS transistor, a back gate of the MOS transistor is connected to a write line and the control data can be written to the nonvolatile data holding section between the control line and the write line, or are formed by a transistor having an MFMIS structure in which a ferroelectric capacitor is connected to the gate side of the MOS transistor through a common electrode or a wiring, a capacitor is connected between a connecting portion of a gate electrode of the MOS transistor and the ferroelectric capacitor and a ground or a write line, and the control data can be written to the nonvolatile data holding section between the control line and the ground or write line. [0016]
    [0017] The nonvolatile data holding section can also be constituted by an element utilizing a magnetoresistance effect or by a single electron memory. [0017]
    [0018] If the display device is constituted by the organic EL element, a small-sized display device can easily be manufactured and gradation display can be carried out, which is suitable for constituting a very small display device such as a microdisplay with low power consumption. [0018]
    [0019] The preset invention provides a method of driving a nonvolatile display device wherein display elements constituting each pixel are arranged in a matrix and ON/OFF of each of the display elements is controlled to sequentially change a display image by a control element provided in the each of the display elements, comprising the steps of; providing a nonvolatile data holding section in the control element for controlling a driving operation of the each of the display elements, carrying out a display on a display element having no change in a control state of the display elements based on the data of the nonvolatile data holding section without applying the display data, and applying and displaying the new display data to only a display element to be changed in a display state, and recording the new display data in the nonvolatile data holding section. [0019] BRIEF DESCRIPTION OF THE DRAWINGS
    [0020] FIG. 1 is a diagram illustrating the basic structure of a display device according to an embodiment of the present invention; [0020]
    [0021] FIG. 2 is a diagram illustrating a variant in which a selective transistor is provided on the structure of FIG. 1; [0021]
    [0022] FIG. 3 is a diagram illustrating a variant in which a capacitor is provided on the structure of FIG. 2; [0022]
    [0023] FIG. 4 is a diagram illustrating a variant in which a capacitor is provided on the structure of FIG. 2; [0023]
    [0024] FIGS. [0024] 5(a) to 5(d) are diagrams illustrating the structure of a ferroelectric memory in which a MOS transistor and a ferroelectric capacitor are combined;
    [0025] FIG. 6 is a chart showing a hysteresis characteristic of a ferromagnetic substance; [0025]
    [0026] FIG. 7 is a diagram illustrating a structure of an organic EL element; [0026]
    [0027] FIG. 8 is a diagram illustrating an example in which a microdisplay is constituted by a reflection type liquid crystal panel; [0027]
    [0028] FIG. 9 is a diagram illustrating an example of an operation in which a matrix is formed with the structure shown in FIG. 1; [0028]
    [0029] FIGS. [0029] 10(a) to 10(c) are diagrams illustrating a structure in which an MR element is used as a nonvolatile data holding section;
    [0030] FIGS. [0030] 11(a) and 11(b) are diagrams illustrating a structure in which a single electronic memory is used as the nonvolatile data holding section; and
    [0031] FIG. 12 is a diagram illustrating an example of a structure in which a display device is constituted by a conventional liquid crystal panel. [0031] DETAILED DESCRIPTION
    [0032] Next, description will be given to a nonvolatile display device and a method of driving the nonvolatile display device according to the present invention with reference to the drawings. In the nonvolatile display device according to the present invention, a display element [0032] 1 composed of an organic EL element and a control element composed of a MOS transistor 2 are connected in series between a driving line 6 to be driven with a voltage or a current and a ground GND, for example, as shown in FIG. 1 which is an equivalent circuit diagram illustrating a basic structure thereof. A gate of the MOS transistor 2 is connected to a control line 7 through a nonvolatile data holding section 3 composed of a ferroelectric capacitor 3 and can hold the control data of the MOS transistor 2 in a floating state.
    [0033] The control element [0033] 2 and the nonvolatile data holding section 3 may be formed to have the same structures as those of an EEPROM and a flash memory in a semiconductor memory. An example of an ferroelectric memory using a ferroelectric layer is shown in FIGS. 5(a) to 5(c). FIG. 5(a) shows an example of an MFS structure in which a gate electrode (M) 25 is provided through a ferroelectric layer (F) 31 on a channel region (S) 24 interposed by n-type regions to be a source 22 and a drain 23 which are formed on a p-type semiconductor substrate 21. Moreover, FIG. 5(b) shows an example of an MFIS structure in which a buffer layer (I) 26 such as SiO2 is provided between the ferroelectric layer 31 and the semiconductor substrate 21 (channel region 24) in FIG. 5(a).
    [0034] Furthermore, FIG. 5([0034] c) shows an example of an MFMIS structure in which an electrode to be the gate electrode (M) 25 is provided between the ferroelectric layer 31 and the buffer layer 26 in FIG. 5(b) and an electrode provided on the ferroelectric layer 31 is formed as an upper electrode (M) 32 of the ferroelectric capacitor 3. With the MFMIS structure, the ferroelectric capacitor 3 is not formed on the channel region but may be formed in another part and be electrically connected to the gate electrode 25.
    [0035] The operation of the MFS structure will be described with reference to FIG. 5([0035] d). When a positive voltage is applied to the gate electrode 25, the ferroelectric layer 31 is polarized as shown in FIG. 5(d) and electrons are induced into the channel region so that a depletion layer is formed. Consequently, the drain 22 and the source 23 are conducted so that a display section 1 is turned ON. In addition, the ferroelectric layer 31 has a hysteresis characteristic as shown in FIG. 6. Therefore, even if the application of a positive voltage to the gate electrode 25 is removed, the polarization state is maintained as it is and a conductive (ON) state is held. More specifically, the ferroelectric capacitor 3 having the ferroelectric layer 31 interposed between the gate electrode 25 and the semiconductor substrate 21 is formed on the gate of the control element in the MOS transistor. Data are held by the ferroelectric layer 31. This relationship is also operated with the structures shown in FIGS. 5(b) and 5(c) in the same manner.
    [0036] The display element [0036] 1 can be constituted by a liquid crystal display element, an organic EL element, an LED or the like. In order to constitute a very small microdisplay having a size of the whole display device of approximately several cm per square or less, a driving current should be considerably reduced also in the organic EL element. If the organic EL element has a constant current or more, a light having an intensity corresponding to a current value is emitted. Therefore, by controlling the current value, gradation display can easily be carried out, which is preferable. In the example shown in FIG. 1, the organic EL element is used as the display element.
    [0037] The organic EL element is provided with a first electrode [0037] 12 formed of Al, Cu, Mg, Ag or the like so as to be connected to an output electrode of a control circuit (LSI) 11 a formed on a substrate (wafer) 11 made of silicon or the like through a contact hole of an insulating film 11 b such as SiO2 as shown in FIG. 7, for example. An organic layer 17 having at least an EL light emitting layer 14 is provided on the first electrode 12. A second electrode 19 having a light transmitting property such as indium oxide is provided on the organic layer 17. The organic layer 17 includes a hole transporting layer 13 comprising NPD, for example, an EL light emitting layer 14 composed of Alq doped with 1% by weight of quinacridone or coumalin, an electron transporting layer 15 comprising Alq and an electron injecting layer 16 comprising LiF. In the case in which a light emitting output is to be monitored, a transparent electrode such as an ITO is sometimes used as the first electrode 12.
    [0038] By changing the material of the organic layer [0038] 17, a light emitting color can be varied. By providing a color filter, one pixel is formed by primaries of R, G and B. Alternatively, patterning is carried out to obtain a necessary pixel number from simple display of approximately 100×100 or less to precise display of approximately 1000× 1000 or less by monochrome so that each pixel is formed in a matrix. Consequently, a very small microdisplay having several cm per square or less is formed with fine color display.
    [0039] In the case in which each pixel of a liquid crystal display is to be used as the display element [0039] 1, it is preferable that the control element 2 and the nonvolatile data holding section 3 should be formed on a silicon substrate or the like as described above. Therefore, it is preferable that a reflection type liquid crystal display should be formed. In the case in which the reflection type liquid crystal panel is to be formed, LEDs of R, G and B are provided on the front side of the reflection type liquid crystal panel 101 formed on the silicon substrate as shown in FIG. 8 which is a sectional view showing an example of the microdisplay. By controlling the LED synchronously with the driving operation of a liquid crystal, color display can be obtained with fine pixels. The reference numeral 102 denotes a lens for directly forming an image on a retina of human eyes and the reference numeral 103 denotes a case.
    [0040] Next, the operation of the basic structure shown in FIG. 1 will be described. With this structure, a set of the organic EL element [0040] 1 constituting one pixel, the MOS transistor 2 and the nonvolatile data holding section 3 is provided in a matrix, and the organic EL element 1 of each pixel arranged in a column direction and the source and drain of the MOS transistor 2 are connected in series between the driving line 6 and the ground GND, for example. The driving line 6 is not restricted to the column direction but all the pixels can be connected in common. The gate side of the MOS transistor 2 of each pixel arranged in the row direction is connected to a control line 7 through the ferroelectric capacitor (the above-mentioned MFS, MFIS or MFMIS structure) 3, and a back gate of the MOS transistor 2 of the pixel arranged in the column direction is connected to a write line 8. Consequently, a matrix for selecting a pixel by specification of a row line and a column line is formed.
    [0041] More specifically, a voltage is applied between the control line [0041] 7 and the write line 8 so that the ferroelectric layer can be polarized as described above. A signal for controlling the ON/OFF of the organic EL element 1 is applied to the MOS transistor 2 to be a control element and is written to the data holding section 3. In this case, the ON/OFF can be reversed by reversing the positive and negative signs of the voltage to be applied between the control line 7 and the write line 8. By applying a reverse voltage to only the pixel to be ON/OFF changed, each pixel can be always controlled to be set in the display state. If there is no write line as in an example of FIG. 3 which will be described below, a pixel to be selected on a selecting line 9 connecting a pixel in the column direction is specified. The connections in the row and column directions may be reversed, respectively.
    [0042] As shown in an example of a voltage to be applied to each line in the case in which the display is to be carried out on a certain pixel P (write is carried out in the data holding section) with this structure, for instance, in the case in which the pixel P selected from pixels formed in a matrix shown in FIG. 9 is to be carried out, a so-called ⅓V[0042] cc method is executed. For example, a write voltage of ⅓Vcc is applied to the control line 7 of the pixel thus selected and a voltage of −⅓Vcc is applied to the other control line 7, and a voltage of −⅔Vcc is applied to the write line 8 of the pixel selected and 0 is applied to the other write line 8. The write is carried out by applying an electric potential of Vcc. When the electric potential of Vcc is applied to the control line to which the pixel P belongs and 0 is applied to the write line, an electric potential of Vcc for writing prevention should be applied to a write line to which the pixel does not belong. Since the influence on other pixels cannot be prevented, this method cannot be used. When electric potentials of ½Vcc and −½Vcc are applied, an electric potential of |½Vcc| is always applied to a non-selected pixel. Consequently, the method is not preferable to minimize a voltage applied to the non-selected pixel.
    [0043] This method has the following difficulty. More specifically, a voltage of |⅓V[0043] cc| is always applied to the non-selected pixel, a channel region of each cell should be isolated by a well and each cell should be separated from each other or should be isolated by an insulator so that the cell is made large-sized, and gradation display is carried out with difficulty by only the ON/OFF control. However, in spite of such a difficulty, it is possible to constitute a much more excellent nonvolatile display device by an EEPROM or a flash memory.
    [0044] In the case in which a dynamic image is to be displayed for a long time, therefore, there are serious problems, that is, writing and erasing operations should be carried out at a high voltage of 12 V in the EEPROM and the flash memory and a booster circuit is required and power consumption is large, the writing operation should be carried out after the erasing operation is executed once so that the writing operation takes several milliseconds to several seconds, the writing operation is carried out 10[0044] 5 times and a lifetime is too short when a dynamic image is to be rewritten 60 times per second. By using the ferroelectric capacitor, however, the writing operation can be carried out at a speed of 10 nanoseconds or less at a voltage of 3 V or less. In addition, the number of rewriting operations is 1012 times or more and the lifetime can be thereby prolonged.
    [0045] The structure shown in FIG. 2 is an example to eliminated the drawback that the writing operation carries out the gradation display with difficulty by only the ⅓ V[0045] cc method and the ON/OFF control. More specifically, the source and the drain of the selective transistor 4 are connected between the ferroelectric capacitor 3 and the control line 7, and the gate of the selective transistor 4 of each pixel arranged in the column direction is connected to a selective line 9. In other words, the selective line 9 is connected in parallel with the write line 8. As a result, a pixel to which display data are applied can be selected by the control line 7 and the selective line 9, and a voltage to be a desirable threshold voltage is applied between the control line 7 to which the selected pixel belongs and the write line 8. Consequently, a driving current flowing to the display element 1 can be controlled to have a desirable value.
    [0046] More specifically, only one pixel is selected by the selective transistor [0046] 4. Therefore, other pixels are not influenced but an electric potential to be applied to the control line 7 can be set optionally. In this case, when the ferroelectric capacitor 3 is polarized at a low voltage, is polarized to an intermediate voltage to be maintained. Before that, it is necessary to apply a voltage (a negative voltage) in a reverse direction, thereby erasing a polarization written at a high voltage. With such a structure, the display data can be applied without using the ⅓Vcc method, and the gradation display as well as the ON/OFF control can be carried out.
    [0047] With the structures shown in FIGS. 3 and 4, the back gate control can be eliminated and a cell can be highly integrated to cause the whole display device to be very small-sized. More specifically, the capacitor [0047] 5 is connected between a connecting portion of the MOS transistor 2 and the ferroelectric capacitor 3 which are control elements and the ground GND(the structure shown in FIG. 3) or the write line 8 (the structure shown in FIG. 4) and a voltage is applied between the control line 7 and the ground GND or write line 8 so that display data are applied to the MOS transistor 2 to be the control element and the display data are written to the ferroelectric capacitor 3 to be the data holding section. With the structure shown in FIG. 3, the write line is not required but a reverse potential is required when the ON/OFF is to be reversed. Therefore, a booster circuit for obtaining a double electric potential is required. On the other hand, with the structure shown in FIG. 4, it is preferable that an electric potential to be applied should be reversed between the control line 7 and the write line 8. Consequently, there is an advantage that the booster circuit is not required.
    [0048] The connection to the write line [0048] 8 through the capacitor 5 is carried out for the following reason. More specifically, when the connecting portion of the ferroelectric capacitor 3 and the MOS transistor 2 is directly connected to the write line 8, both electrodes of the ferroelectric capacitor 3 are set in such a state that electric charges can be moved because the other end side of the ferroelectric capacitor 3 is also connected to the control line 7 through the selective transistor 4 (through no insulating layer). In such a state that the electric charges can be moved, even the polarization of the ferroelectric substance is annihilated so that the data cannot be held. In other words, one of the electrodes of the ferroelectric capacitor 3 should be set in such a floating state as to be electrically insulated by the gate insulating film of the MOS transistor 2, the capacitor 5 or the like as shown in FIGS. 3 and 4.
    [0049] With these structures, it is not necessary to carry out the back gate control. Therefore, it is not necessary to make the back gate independent by each pixel so that a space between cells can be reduced and high integration can be obtained. In addition, the applied voltage can be divided efficiently and can be applied to the ferroelectric capacitor [0049] 3. More specifically, with the structures shown in FIGS. 1 and 2, it is hard to fabricate a high characteristic element having the MFS structure in respect of a semiconductor manufacturing process. Therefore, the MFIS structure is used practically. With the MFIS structure, however, the ferroelectric capacitor and a capacitor to be an insulating film having a small dielectric constant are connected in series and a voltage is applied to both ends thereof. The voltage applied to the both ends is divided and applied to the ferroelectric capacitor and the capacitor having a low dielectric constant. A division ratio of the voltage is inversely proportional to respective capacities. Therefore, only a low voltage is applied to a ferroelectric capacitor having a high dielectric constant and a great capacity. Therefore, a high voltage is required to obtain a desirable division characteristic.
    [0050] On the other hand, with such a structure that a voltage can be applied through the capacitor [0050] 5 separate from the insulating film of the MFIS structure as shown in FIGS. 3 and 4, the capacity of the capacitor 5 can be increased by using an insulating film having a high dielectric constant or increasing an area because the capacitor 5 is not related to the transistor. Thus, the division ratio into the ferroelectric capacitor 3 can be increased.
    [0051] FIGS. [0051] 10(a) to 10(c) show an example in which a magnetoresistive element (MR element) 3 b is used as a nonvolatile data holding section. More specifically, an MRMA (magnetoresistive memory) connected to a control line 7 through the MR element 3 b and a display element 1 are connected to the gate side of a MOS transistor 2 to be a control element, thereby constituting one pixel. A connecting portion of the MR element 3 b and the gate of the MOS transistor 2 is connected to a ground GND through a resistor R1.
    [0052] The MR element [0052] 3 b has ferromagnetic layers 302 and 303 provided on both sides through a non-magnetic layer 301 as shown in FIG. 10(c). By causing a current to flow, the direction of magnetization is inverted. In the case in which the directions of magnetization of both ferromagnetic layers 302 and 303 are parallel (the same direction) and non-parallel (the reverse direction) (the resistance is higher in the non-parallel direction), 0 and 1 (ON and OFF) can be stored depending on a difference between the resistances. A writing current is caused to flow between the control line 7 and the write line 8 shown in FIG. 10(a). The ON/OFF control is carried out depending on a current flowing between the control line 7 and the ground GND. The MOS transistor 2 is controlled so that the application of the electric potential of the control line to the display element 1 is controlled with a voltage V1 divided by the MR element 3 b and the resistor R1.
    [0053] More specifically, a voltage V[0053] B of the control line 7 is divided into the resistor RMR of the MR element 3 b and the resistor R1. Consequently, V1=VB·R1/(RMR+R1) is obtained. If the MR element 3 b has a low resistance RMR(ON), V1=VB·R1/(RMR(ON)+R1) is obtained. If the MR element 3 b has a high resistance RMR(OFF), V1=VB·R1/(RMR(OFF)+R1) is obtained. Accordingly, the voltage VB of the control line 7 is set such that the transistor 2 is turned ON or OFF with this voltage. Consequently, at the time of standby in which the display state is not changed, the voltage is maintained to be applied so that the same display can be continuously obtained. Moreover, when writing to change the display state is to be carried out, the control line other than the control line of a pixel to be selected is set to the ground GND and a writing voltage is applied between the control line 7 of the pixel to be selected and the write line 8. Consequently, the resistance of the MR element 3 b is changed.
    [0054] With this structure, the electric potential V[0054] B should be continuously applied to the control line 7 while the display device is operated differently from the case in which the ferroelectric substance is used. However, the resistance of the MR element 3 b can be greatly increased by using an insulating layer for an intermediate layer 301 of the MR element 3 b, and can be set to be 109 Ω or more which is almost equal to that of the organic EL element 1. Consequently, an electric potential VD for driving the organic EL element 1 can also be applied exactly and power consumption is less increased and a driving method can be carried out easily. On the other hand, it is not necessary to apply the whole display data of an image again at each time and new data can be applied to only a changed image. Therefore, also in the case in which a dynamic image to be changed at a rate of approximately 60 frames per second is to be transmitted through internet, the data can be greatly compressed so that a data processing can be carried out very easily.
    [0055] In the above-mentioned example, the ON/OFF of the MR element [0055] 3 b has been described. In the case in which gradation display having a brightness changed is to be carried out, plural sets of control lines 71, 72 and 73 and writelines 81, 82 and 83 are provided as shown in FIG. 10(b), for example. Thus, the degree of magnetization is varied with a different current so that a resistance value can be varied and a control voltage of the MOS transistor 2 can be changed. Consequently, the gradation display can be obtained.
    [0056] By using the MR element as the nonvolatile data holding section, thus, the size can be reduced to be almost equal to that of a DRAM. In addition, the rewriting operation can be carried out in a short time almost infinite times. The display data of each pixel are continuously held. Therefore, also in the case in which the display data of a dynamic image are to be transferred, the data volume is reduced and it is not necessary to carry out a work for creating and reconstituting compression data. Thus, a signal processing can be executed very readily. [0056]
    [0057] FIGS. [0057] 11(a) and 11(b) show an example in which the nonvolatile data holding section is constituted by a single electronic memory 3 c. More specifically, FIG. 11(a) shows an example of a horizontal type structure in which a multilayered tunnel junction (MTJ) is formed on the gate side of the MOS transistor 2 and electrons are tunneled as in a memory, thereby carrying out writing. Also in such a structure, an electric potential can be held in the single electron memory 3 c by applying a voltage between the control line 7 and the driving line 6, and the display state can be held in a floating state. As a result, the display data of each pixel can be held in the same manner as that described above. It is preferable that new display data should be applied to only the pixel to be changed in the display state.
    [0058] FIG. 11([0058] b) shows an example in which the same structure is constituted by a vertical type MOSFET. With this structure, the vertical type MOSFET is provided separately from the MOS transistor 2 to be the control element and a tunnel layer is provided, and a gate is connected to the write line 9 and a drain is connected to the control line 7. Cc denotes an intrinsic capacitor (built-in coupling capacitor). In an operation, display data can be held in the same manner as in the horizontal type MOSFET in FIG. 11(a).
    [0059] With such a structure, the number of writing operations can be increased considerably and electrons can be floated in the same manner as in a flash memory. The same display can be continuously maintained even if data for display are not applied consecutively. Consequently, power consumption can be reduced, a data volume can be decreased considerably and data can be transferred easily in the same manner as compression data. [0059]
    [0060] In each of the above-mentioned examples, the organic EL element has been used-as the display element [0060] 1. Also in the LED to be the display element, the current driving operation can be carried out with the same circuit structure. On the other hand, if a liquid crystal device is used as the display element, a brightness of a liquid crystal cannot be changed with the control voltage of the MOS transistor 2 due to voltage driving. Consequently, binary display of ON/OFF is obtained. However, an image can be displayed while holding the display data with the same circuit structure as that shown in FIGS. 1 to 4.
    [0061] According to the present invention, the display element is combined with the nonvolatile memory. Therefore, it is not necessary to rewrite the display data of whole pixels at any time and it is sufficient that new display data are applied to only a pixel to be changed in a display state. Consequently, if a ferroelectric substance is used as the nonvolatile memory, rewriting power can be reduced considerably so that power consumption can be lessened remarkably. Even a microdisplay can be operated for a long period with a very small battery. As a result, the spread of an HMD (Head Mounted Display) or the like can be achieved, and application to a wellable computer, a finder, a handy phone and the like can be promoted. [0061]
    [0062] Furthermore, the display data of each pixel can be held continuously. Therefore, also in the case in which the display data such as a dynamic image are to be processed, it is sufficient that only the data of a pixel to be changed are processed. Thus, a data processing can be lessened considerably. Also in the case in which data transfer is to be carried out through internet communication, a processing can be carried out easily with a very small data volume. [0062]
    [0063] By using this method for the liquid crystal display, furthermore, display data do not need to be changed because a pixel which is not changed has a display state of nonvolatile held data. Therefore, a jitter is not caused. In the case in which this method is used for a projector or the like, an eye-friendly display state can be obtained. [0063]
    [0064] Numerous modifications and alternative embodiments of the present invention will be apparent to those skilled in the art in view of the foregoing description. Accordingly, this description is to be construed as illustrative only, and is provided for the purpose of teaching those skilled in the art the best mode of carrying out the invention. The details of the structure and/or function may be varied substantially without departing from the spirit of the invention and all modifications which come within the scope of the appended claims are reserved. [0064]
    权利要求:
    Claims (10)
    [1" id="US-20010007447-A1-CLM-00001] 1. A nonvolatile display device comprising:
    a display element;
    a control element for controlling a voltage or a current to be applied to said display element to drive said display element; and
    a nonvolatile data holding section integrated with said control element or connected to said control element and capable of holding control data of said control element in a floating state.
    [2" id="US-20010007447-A1-CLM-00002] 2. The display device of
    claim 1 , wherein said control element is formed of a MOS transistor type element, one of a drain and a source of said MOS transistor type element is connected to said display element and the other is connected to a driving line, a gate side of said MOS transistor type element is connected to a control line through said nonvolatile data holding section, and plural sets of said display element, said control element and said nonvolatile data holding section are formed as each pixel in a matrix.
    [3" id="US-20010007447-A1-CLM-00003] 3. The display device of
    claim 2 , wherein a selective transistor is connected between said nonvolatile data holding section and said control line, and a gate of said selective transistor is connected to a selective line.
    [4" id="US-20010007447-A1-CLM-00004] 4. The display device of
    claim 1 , wherein said nonvolatile data holding section is formed of a ferroelectric capacitor.
    [5" id="US-20010007447-A1-CLM-00005] 5. The display device of
    claim 2 , wherein said control element and said nonvolatile data holding section are formed of a transistor having an MFS structure or an MFIS structure in which a ferroelectric capacitor is formed integrally on the gate side of a MOS transistor, a back gate of said MOS transistor is connected to a write line, and the control data can be written to said nonvolatile data holding section between said control line and said write line.
    [6" id="US-20010007447-A1-CLM-00006] 6. The display device of
    claim 2 , wherein said control element and said nonvolatile data holding section are formed of a transistor having an MFMIS structure in which a ferroelectric capacitor is connected to the gate side of a MOS transistor through a common electrode or a wiring, a capacitor is connected between a connecting portion of a gate electrode of said MOS transistor and said ferroelectric capacitor and a ground or a write line, and the control data can be written to said nonvolatile data holding section between said control line and said ground or said write line.
    [7" id="US-20010007447-A1-CLM-00007] 7. The display device of
    claim 1 , wherein said nonvolatile data holding section is constituted by an element utilizing a magnetoresistance effect.
    [8" id="US-20010007447-A1-CLM-00008] 8. The display device of
    claim 1 , wherein said nonvolatile data holding section is constituted by a single electron memory.
    [9" id="US-20010007447-A1-CLM-00009] 9. The display device of
    claim 1 , wherein said display element is formed by an organic EL element.
    [10" id="US-20010007447-A1-CLM-00010] 10. A method of driving a nonvolatile display device wherein display elements constituting each pixel are arranged in a matrix and ON/OFF of each of said display elements is controlled to sequentially change a display image by a control element provided in said each of said display elements, comprising the steps of:
    providing a nonvolatile data holding section in said control element for controlling a driving operation of said each of said display elements;
    carrying out a display on a display element having no change in a control state of said display elements, based on the data of said nonvolatile data holding section without applying the display data; and
    applying and displaying the new display data to only a display element to be changed in a display state and recording said new display data in said nonvolatile data holding section.
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US5349366A|1991-10-29|1994-09-20|Semiconductor Energy Laboratory Co., Ltd.|Electro-optical device and process for fabricating the same and method of driving the same|
    US5952789A|1997-04-14|1999-09-14|Sarnoff Corporation|Active matrix organic light emitting diode display pixel structure and data load/illuminate circuit therefor|
    US6229506B1|1997-04-23|2001-05-08|Sarnoff Corporation|Active matrix light emitting diode pixel structure and concomitant method|
    US6521927B2|1997-06-24|2003-02-18|Kabushiki Kaisha Toshiba|Semiconductor device and method for the manufacture thereof|
    US6069381A|1997-09-15|2000-05-30|International Business Machines Corporation|Ferroelectric memory transistor with resistively coupled floating gate|
    US6563480B1|1997-10-20|2003-05-13|Nec Corporation|LED display panel having a memory cell for each pixel element|EP1326162A2|2002-01-02|2003-07-09|Hewlett-Packard Company|An integrated digitizing tablet and display apparatus and method of operation|
    US20030218173A1|2002-04-09|2003-11-27|Takeshi Nishi|Light emitting device|
    US20040124442A1|2002-12-27|2004-07-01|Semiconductor Energy Laboratory Co., Ltd.|Display device|
    US20040227748A1|2003-05-14|2004-11-18|Hiroshi Iwata|Display driver, display device, and portable electronic apparatus|
    US20050206590A1|2002-03-05|2005-09-22|Nec Corporation|Image display and Its control method|
    US20060208976A1|2005-03-11|2006-09-21|Sanyo Electric Co., Ltd.|Active matrix type display device and driving method thereof|
    US20060214889A1|2005-03-11|2006-09-28|Sanyo Electric Co., Ltd.|Active matrix type display device|
    US20060226788A1|2005-03-11|2006-10-12|Sanyo Electric Co., Ltd.|Active matrix type display device and driving method thereof|
    US20070222723A1|2002-08-09|2007-09-27|Tatsuya Sugita|Image display apparatus and image display module|
    CN100377201C|2003-12-22|2008-03-26|Lg.菲利浦Lcd株式会社|Liquid crystal display device and driving method thereof|
    US20090315066A1|2000-03-27|2009-12-24|Semiconductor Energy Laboratory Co., Ltd.|Electro-Optical Device|
    US20100214203A1|2004-07-26|2010-08-26|Samsung Electronics Co., Ltd.|Liquid crystal display device including sensing element|
    CN102439652A|2010-04-05|2012-05-02|松下电器产业株式会社|Organic el display device and method for controlling same|
    US8405583B2|2010-04-05|2013-03-26|Panasonic Corporation|Organic EL display device and control method thereof|
    US20150035871A1|2013-08-05|2015-02-05|Samsung Display Co., Ltd.|Display device and driving method thereof|
    WO2017171970A1|2016-03-31|2017-10-05|Intel Corporation|Micro led display pixel architecture|
    US10079060B2|2014-07-07|2018-09-18|Crossbar, Inc.|Sensing a non-volatile memory device utilizing selector device holding characteristics|
    US10096362B1|2017-03-24|2018-10-09|Crossbar, Inc.|Switching block configuration bit comprising a non-volatile memory cell|
    US10115819B2|2015-05-29|2018-10-30|Crossbar, Inc.|Recessed high voltage metal oxide semiconductor transistor for RRAM cell|
    CN108766352A|2012-11-14|2018-11-06|索尼公司|Light-emitting component, display device and electronic device|
    US10121540B1|2014-03-11|2018-11-06|Crossbar, Inc.|Selector device for two-terminal memory|
    US10211397B1|2014-07-07|2019-02-19|Crossbar, Inc.|Threshold voltage tuning for a volatile selection device|
    US10210929B1|2014-07-09|2019-02-19|Crossbar, Inc.|Non-volatile memory cell utilizing volatile switching two terminal device and a MOS transistor|
    US20190157278A1|2017-11-22|2019-05-23|International Business Machines Corporation|Ferro-electric complementary fet|
    US20200005715A1|2006-04-19|2020-01-02|Ignis Innovation Inc.|Stable driving scheme for active matrix displays|US5302966A|1992-06-02|1994-04-12|David Sarnoff Research Center, Inc.|Active matrix electroluminescent display and method of operation|
    US5631664A|1992-09-18|1997-05-20|Olympus Optical Co., Ltd.|Display system utilizing electron emission by polarization reversal of ferroelectric material|
    JPH06337400A|1993-05-31|1994-12-06|Sharp Corp|Matrix type display device and method for driving it|
    US5463279A|1994-08-19|1995-10-31|Planar Systems, Inc.|Active matrix electroluminescent cell design|
    US5587329A|1994-08-24|1996-12-24|David Sarnoff Research Center, Inc.|Method for fabricating a switching transistor having a capacitive network proximate a drift region|
    US5684365A|1994-12-14|1997-11-04|Eastman Kodak Company|TFT-el display panel using organic electroluminescent media|
    JPH08241057A|1995-03-03|1996-09-17|Tdk Corp|Image display device|
    TW455725B|1996-11-08|2001-09-21|Seiko Epson Corp|Driver of liquid crystal panel, liquid crystal device, and electronic equipment|
    US6462722B1|1997-02-17|2002-10-08|Seiko Epson Corporation|Current-driven light-emitting display apparatus and method of producing the same|
    JP3528182B2|1997-02-17|2004-05-17|セイコーエプソン株式会社|Display device|
    US6175345B1|1997-06-02|2001-01-16|Canon Kabushiki Kaisha|Electroluminescence device, electroluminescence apparatus, and production methods thereof|
    JPH11109891A|1997-09-29|1999-04-23|Fuji Photo Film Co Ltd|Two-dimensional active matrix type light modulation element and two-dimensional active matrix type light emitting element|
    JP3544141B2|1998-05-13|2004-07-21|三菱電機株式会社|Magnetic detecting element and magnetic detecting device|
    US6188375B1|1998-08-13|2001-02-13|Allied Signal Inc.|Pixel drive circuit and method for active matrix electroluminescent displays|
    GB0000290D0|2000-01-07|2000-03-01|Koninkl Philips Electronics Nv|Active matrix electroluminescent display device|
    US6278242B1|2000-03-20|2001-08-21|Eastman Kodak Company|Solid state emissive display with on-demand refresh|
    TW561445B|2001-01-02|2003-11-11|Chi Mei Optoelectronics Corp|OLED active driving system with current feedback|KR100450754B1|2002-01-17|2004-10-01|한국전자통신연구원|High brightness field emission display|
    JP2004220021A|2002-12-27|2004-08-05|Semiconductor Energy Lab Co Ltd|Display device|
    US7492338B2|2003-10-28|2009-02-17|Semiconductor Energy Laboratory Co., Ltd.|Display device|
    JP2009516229A|2005-11-16|2009-04-16|ポリマー、ビジョン、リミテッド|Method for addressing an active matrix display with pixels based on ferroelectric thin film transistors|
    JP5184760B2|2006-06-05|2013-04-17|ラピスセミコンダクタ株式会社|Current drive circuit|
    JP5207885B2|2008-09-03|2013-06-12|キヤノン株式会社|Pixel circuit, light emitting display device and driving method thereof|
    JP5575162B2|2012-02-13|2014-08-20|ラピスセミコンダクタ株式会社|Current drive circuit|
    法律状态:
    2001-01-11| AS| Assignment|Owner name: ROHM CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TANAKA, HARUO;NAKAMURA, TAKASHI;REEL/FRAME:011540/0627 Effective date: 20001229 |
    2010-06-28| FPAY| Fee payment|Year of fee payment: 4 |
    2014-06-25| FPAY| Fee payment|Year of fee payment: 8 |
    2018-09-10| FEPP| Fee payment procedure|Free format text: MAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
    2019-02-25| LAPS| Lapse for failure to pay maintenance fees|Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
    2019-02-25| STCH| Information on status: patent discontinuation|Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
    2019-03-19| FP| Lapsed due to failure to pay maintenance fee|Effective date: 20190123 |
    优先权:
    申请号 | 申请日 | 专利标题
    JP2000-006019||2000-01-11||
    JP2000006019A|JP4212079B2|2000-01-11|2000-01-11|Display device and driving method thereof|
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