• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The semiconducting ceramic material of the present invention containing BaTiO3 and having a positive temperature coefficient of resistance is endowed with high withstand voltage. In the semiconducting ceramic material, a boundary temperature defined at the boundary between a first temperature range and a second temperature range is 180° C. or more (e.g., 370° C.) higher than the Curie temperature, wherein the first temperature range is higher than the Curie temperature and the ceramic material has a positive temperature coefficient of resistance in the range, and the second temperature range is higher than the first temperature range and the ceramic material has a negative temperature coefficient of resistance in the range.
    公开号:US20010003361A1
    申请号:US09/730,133
    申请日:2000-12-05
    公开日:2001-06-14
    发明作者:Hideaki Niimi；Akira Ando；Mitsutoshi Kawamoto；Masahiro Kodama
    申请人:Murata Manufacturing Co Ltd；
    IPC主号:C04B35-468
    专利说明:
    [0001] 1. Field of the Invention [0001]
    [0002] The present invention relates to a semiconducting ceramic material and to an electronic part employing the same. More particularly, the invention relates to a BaTiO[0002] 3 semiconducting ceramic material possessing a positive temperature coefficient of resistance and to an electronic part, such as a thermistor, employing the ceramic material.
    [0003] 2. Background Art [0003]
    [0004] Conventionally, BaTiO[0004] 3 semiconducting ceramic materials, which have a positive temperature coefficient (abbreviated as PTC) of resistance (such characteristic is referred to as a PTC characteristic), have been employed in PTC thermistors used in a wide range of applications; e.g., for demagnetization of a cathode ray tube or as an element in heaters. Furthermore, there has been a strong demand for elevating the withstand voltage of BaTiO3 semiconducting ceramic material in order to broaden its area of use, and addition of elements such as Mn and Ca to the ceramic material has been proposed.
    [0005] However, sufficient withstand voltage in BaTiO[0005] 3 semiconducting ceramic materials which have existing compositional proportions and which are produced through an existing method is difficult to realize, and the thickness of semiconducting ceramic sheets must be increased so as to attain the desired high withstand voltage. However, when a semiconducting ceramic sheet is incorporated into an electronic part such as a monolithic PTC thermistor, the thickness of the ceramic sheet cannot be increased beyond a certain level. Therefore, there has been a strong demand for elevating withstand voltage per unit thickness of a semiconducting ceramic material. SUMMARY OF THE INVENTION
    [0006] In view of the foregoing, the present inventors have conducted extensive studies on semiconducting BaTiO[0006] 3 ceramic materials having a PTC characteristic (hereinafter referred to as “PTC semiconducting BaTiO3 ceramic materials”) in terms of the relationship between withstand voltage and the temperature characteristic of resistance, and have found that controlling the temperature (hereinafter referred to as “TN temperature,” see FIG. 1) defined at the boundary between a first temperature range and a second temperature range to 180° C. or more higher than the Curie temperature results in a withstand voltage remarkably higher than that of an existing similar semiconducting ceramic material, even though the resistance at room temperature is the same in both cases. The first temperature range is higher than the Curie temperature and the ceramic material has a positive temperature coefficient of resistance in this range, and the second temperature range is higher than the first temperature range and the ceramic material has a negative temperature coefficient of resistance.
    [0007] PTC semiconducting BaTiO[0007] 3 ceramic materials produced through a conventional method exhibit a difference between TN temperature and Curie temperature of 100-150° C. The present inventors have elucidated that suppression of a liquid phase component to a minimum level and control of the firing temperature to a temperature at which ceramic is not completely sintered are effective measures for elevating the TN temperature and result in a remarkably high withstand voltage. The present invention has been accomplished on the basis of these findings. The expression “not completely sintered” refers to a state in which sintered ceramic grains are present in association with a volume of intergranular space. In contrast, the expression “completely sintered” refers to a state in which sintered ceramic grains are highly densified such that substantially no intergranular space can be observed under a typical electron microscope.
    [0008] Thus, an object of the present invention is to provide a PTC semiconducting BaTiO[0008] 3 ceramic material having a high withstand voltage. Another object of the present invention is to provide a method of producing the semiconducting ceramic material. Yet another object of the present invention is to provide an electronic part employing the semiconducting ceramic material.
    [0009] Accordingly, in one aspect of the invention, there is provided a semiconducting ceramic material comprising BaTiO[0009] 3 and exhibiting a PTC characteristic, wherein the boundary temperature defined at the boundary between a first temperature range and a second temperature range is 180° C. or more higher than Curie temperature, wherein the first temperature range is higher than Curie temperature and the ceramic material has a positive temperature coefficient of resistance in the range, and the second temperature range is higher than the first temperature range and the ceramic material has a negative temperature coefficient of resistance within this range.
    [0010] Preferably, a portion of Ba atoms are substituted by Sm atoms, SiO[0010] 2 is contained at a mol ratio represented by r1 of approximately 0.0005 and Mn is optionally contained at a mol ratio represented by r2 of 0 to approximately 0.0001, inclusive, the mol ratios being based on BaTiO3 serving as a predominant component.
    [0011] In the present invention, the Curie temperature is an equivalent of crystal phase transition temperature in the transition from tetragonal to cubic or from cubic to tetragonal. [0011]
    [0012] In another aspect of the invention, there is provided an electronic part comprising internal electrodes and a semiconducting ceramic material as recited above, the internal electrodes and the semiconducting ceramic material being alternately superposed one on another. [0012]
    [0013] In yet another aspect of the invention, there is provided a method of producing a semiconducting ceramic material, comprising [0013]
    [0014] mixing a BaTiO[0014] 3 source, a material imparting a semiconducting property to BaTiO3, SiO2, and optionally Mn, to thereby form a mixture;
    [0015] calcining the resultant mixture; [0015]
    [0016] mixing the resultant calcined mixture with an organic binder; [0016]
    [0017] compacting the resultant mixture, to thereby yield a compact; [0017]
    [0018] firing the compact in an H[0018] 2/N2 atmosphere at a temperature lower than a temperature at which the mixture is completely sintered; and
    [0019] performing re-oxidation of the fired compact in air. [0019]
    [0020] Preferably, the re-oxidization is carried out at approximately 1000° C. [0020]
    [0021] Preferably, the firing temperature is approximately 1225-1275° C. [0021]
    [0022] Although the temperature at which a ceramic material is completely sintered depends on the chemical composition thereof, a semiconducting ceramic material according to the present invention is completely sintered at 1350° C. [0022]
    [0023] As is the case conventionally, when the difference between the TN temperature and Curie temperature is 180° C. or less, sufficient withstand voltage cannot be attained. [0023] BRIEF DESCRIPTION OF THE DRAWINGS
    [0024] Various other objects, features, and many of the attendant advantages of the present invention will be readily appreciated as the same becomes better understood with reference to the following detailed description of the preferred embodiments when considered in connection with accompanying drawings, in which: [0024]
    [0025] FIG. 1 is a graph showing a resistance-temperature characteristic of a PTC semiconducting BaTiO[0025] 3 ceramic material;
    [0026] FIG. 2 is a graph showing resistance-temperature characteristics of ceramic material samples of Examples 1 to 3 and Comparative Example 1; and [0026]
    [0027] FIG. 3 is an schematic view of one example of a monolithic PTC thermistor. [0027] DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS EXAMPLE 1
    [0028] BaCO[0028] 3, TiO2, Sm2O3, MnCO3 and SiO2 serving as raw materials were blended to prepare mixtures such that the following compositional proportions were attained:
    [0029] Each of the resultant powder mixtures was ground by mixing in water with zirconia balls for five hours, followed by calcination at 1100° C. for two hours. The calcined product was mixed with an organic binder, and the resultant mixture was compacted under dry conditions. The resultant compact was fired at a predetermined temperature in an H[0029] 2/N2 atmosphere, and then re-oxidized at 1000° C. in air, to thereby yield a ceramic specimen. The firing temperature was modified in accordance with the specimen to be prepared. Four kinds of specimens were obtained. A specimen of Comparative Example 1 was obtained through a conventional method in which the PTC characteristic was controlled on the basis of the amount X of Mn that had been added and the amount Y of SiO2 that had been added. Specimens of Examples 1 to 3 were obtained through a method according to the invention in which the amounts of Mn and SiO2 were limited to minimum levels and firing was performed at a relatively low temperature.
    [0030] Table 1 shows properties of the specimens in terms of the amount (X) of Mn added, the amount (Y) of SiO[0030] 2 added, firing temperature, TN temperature, the difference between TN temperature and Curie temperature, resistance at room temperature, the PTC characteristic (the ratio of maximum resistance (Rmax) in the temperature range from 0° C. to 400° C. to resistance (R25) at 25° C., the ratio being rounded to the nearest integer and expressed as the number of digits in the integer), and withstand voltage. FIG. 2 shows the resistance-temperature characteristics of the specimens. TABLE 1 Difference PTC between TN Resistance characteristic Amount Amount Firing TN temperature at room Rmax/R25 (the Withstand (X) of (Y) of temperature temperature and Curie temperature number voltage added Mn added SiO2 (° C.) (° C.) temperature (Ω) of digits) (V/mm) Example 1 0 0.0005 1225 370 250 0.1 6 1200 Example 2 0.00005 0.005 1250 340 220 0.1 6 1100 Example 3 0.0001 0.0005 1275 300 180 0.1 6 900 Comparative 0.0005 0.01 1350 260 140 0.1 6 350 Example 1
    [0031] As is clear from Table 1 and FIG. 2, the withstand voltage of the specimens of Examples 1 to 3 can be considerably elevated by limiting the amounts of Mn and SiO[0031] 2 to minimum levels and firing at low temperature, although the specimens have resistance at room temperature and PTC characteristics similar to those of the specimen of Comparative Example 1. EXAMPLE 2
    [0032] BaCO[0032] 3, TiO2, Sm2O3, MnCO3 and SiO2 serving as raw materials were blended to prepare mixtures such that the following compositional proportions were attained:
    [0033] Each of the resultant powder mixtures was ground by mixing in water with zirconia balls for five hours, followed by calcination at 1100° C. for two hours. The calcined product was mixed with an organic binder and formed into sheets. Ni serving as an internal electrode was printed on each sheet. A plurality of the Ni-coated sheets were laminated, and the resultant laminate was fired in an H[0033] 2/N2 reducing atmosphere. Subsequently, the thus-fired product was heated at 800° C. in air, to thereby simultaneously form Ni external electrodes through baking and effect re-oxidation of the semiconducting ceramic material, thereby yielding a monolithic PTC thermistor 10 (specimen) as shown in FIG. 3. Four kinds of specimens were produced. A specimen of Comparative Example 2 was obtained through a conventional method in which the PTC characteristic was controlled on the basis of the amount x of added Mn and the amount y of added SiO2. Specimens of Examples 4 to 6 were obtained through a method according to the invention in which the amounts of Mn and SiO2 were limited to minimum levels and firing was performed at a relatively low temperature. The monolithic PTC thermistor 10 (specimen) shown in FIG. 3 includes a laminated body 12, in which semiconducting material layers 14 comprising the aforementioned semiconducting material and internal electrodes 16 made of Ni are alternately superposed one on another. Electrodes 16 superposed on alternate layers are disposed so as to extend to a first side face of the laminated body 12, and the remainder of electrodes 16 are disposed so as to extend to a second side face of the laminated body 12. An external electrode 18 a is disposed on the first side face of the laminated body 12, and an external electrode 18 b is disposed on the second side face of the laminated body 12. Thus, the external electrode 18 a is connected to the electrodes 16 superposed on alternate layers, and the external electrode 18 b is connected to the remainder of the electrodes 16.
    [0034] Table 2 shows properties of the specimens in terms of the amount X of added Mn, the amount Y of added SiO[0034] 2, firing temperature, TN temperature, the difference between TN temperature and Curie temperature, resistance at room temperature, the PTC characteristic (Rmax/R25) and withstand voltage. TABLE 2 Difference PTC between TN Resistance characteristic Amount Amount Firing TN temperature at room Rmax/R25 (the Withstand (X) of (Y) of temperature temperature and Curie temperature number voltage added Mn added SiO2 (° C.) (° C.) temperature (Ω) of digits) (V/mm) Example 4 0 0.0003 1200 370 250 0.1 3.2 450 Example 5 0.00004 0.0003 1225 340 220 0.1 3.1 420 Example 6 0.00007 0.0003 1250 300 180 0.1 3.0 350 Comparative 0.0005 0.01 1300 260 140 0.1 1.5 53 Example 2
    [0035] As is clear from Table 2, the withstand voltages of the specimens of Examples 4 to 6 can be elevated considerably by limiting the amounts of Mn and SiO[0035] 2 to minimum levels and firing at low temperature, although the specimens have resistance at room temperature and PTC characteristics similar to those of the specimen of Comparative Example 2.
    [0036] As described hereinabove, the present invention can provide a PTC semiconducting BaTiO[0036] 3 ceramic material having a high withstand voltage and an electronic apparatus, such as a PTC thermistor, employing the ceramic material.
    权利要求:
    Claims (20)
    [1" id="US-20010003361-A1-CLM-00001] 1. A semiconducting ceramic material comprising ATiO3 in which A is Ba or Ba and Sm and which exhibits a positive temperature coefficient of resistance, wherein a boundary temperature defined at the boundary between a first temperature range and a second temperature range is at least 180° C. higher than the Curie temperature of the material, wherein the first temperature range is higher than the Curie temperature and the ceramic material has a positive temperature coefficient of resistance in the first range, and the second temperature range is higher than the first temperature range and the ceramic material has a negative temperature coefficient of resistance in the second range.
    [2" id="US-20010003361-A1-CLM-00002] 2. A semiconducting ceramic material according to
    claim 1 , wherein A is Ba and Sm.
    [3" id="US-20010003361-A1-CLM-00003] 3. A semiconducting ceramic material according to
    claim 2 , wherein said material contains SiO2 and 0 to approximately 0.0001 mols of Mn per mol of ATiO3.
    [4" id="US-20010003361-A1-CLM-00004] 4. A semiconducting ceramic material according to
    claim 3 , wherein said the SiO2 is in an amount of approximately 0.0005 mol per mol of ATiO2.
    [5" id="US-20010003361-A1-CLM-00005] 5. A semiconducting ceramic material according to
    claim 1 , wherein said material contains SiO2 and 0 to approximately 0.0001 mols of Mn per mol of ATiO3.
    [6" id="US-20010003361-A1-CLM-00006] 6. A semiconducting ceramic material according to
    claim 5 , wherein said the SiO2 is in an amount of approximately 0.0005 mol per mol of ATiO2.
    [7" id="US-20010003361-A1-CLM-00007] 7. A semiconducting ceramic material according to
    claim 1 , wherein the boundary temperature is at least about 220° C. higher than the Curie temperature.
    [8" id="US-20010003361-A1-CLM-00008] 8. A semiconducting ceramic material according to
    claim 1 , wherein A is Ba.
    [9" id="US-20010003361-A1-CLM-00009] 9. An electronic part comprising a plurality of internal electrodes and a semiconducting ceramic material as recited in
    claim 1 , the internal electrodes and the semiconducting ceramic material being alternately superposed one on another.
    [10" id="US-20010003361-A1-CLM-00010] 10. A method of producing a semiconducting ceramic material, comprising
    providing a mixture adapted to produce a semiconducting ATiO2 in which A is Ba or Ba and Sm;
    calcining the mixture;
    mixing the resultant calcined mixture with an organic binder;
    compacting the resultant mixture, to thereby yield a compact;
    firing the compact in an H2/N2 atmosphere at a temperature lower than a temperature at which the mixture is completely sintered; and
    re-oxidating of the fired compact in air.
    [11" id="US-20010003361-A1-CLM-00011] 11. A method of producing a semiconducting ceramic material according to
    claim 10 , wherein the mixture is fired at a temperature of less than 1350° C.
    [12" id="US-20010003361-A1-CLM-00012] 12. A method of producing a semiconducting ceramic material according to
    claim 11 , wherein the mixture is fired at a temperature of about 1225 to 1275° C. and the re-oxidating is at a temperature of about 1000° C.
    [13" id="US-20010003361-A1-CLM-00013] 13. A method of producing a semiconducting ceramic material according to
    claim 12 , wherein the mixture contains Mn in a mol ratio of Mn to ATiO3 of 0 to approximately 0.0001.
    [14" id="US-20010003361-A1-CLM-00014] 14. A method of producing a semiconducting ceramic material according to
    claim 13 , wherein the mixture contains SiO2 and the mol ratio of SiO2 to ATiO3 is approximately 0.0005.
    [15" id="US-20010003361-A1-CLM-00015] 15. A method of producing a semiconducting ceramic material according to
    claim 14 , wherein A is Ba.
    [16" id="US-20010003361-A1-CLM-00016] 16. A method of producing a semiconducting ceramic material according to
    claim 14 wherein A is Ba and Sm.
    [17" id="US-20010003361-A1-CLM-00017] 17. A method of producing a semiconducting ceramic material according to
    claim 10 , wherein the mixture contains Mn in a mol ratio of Mn to ATiO3 of 0 to approximately 0.0001.
    [18" id="US-20010003361-A1-CLM-00018] 18. A method of producing a semiconducting ceramic material according to
    claim 17 wherein the mixture contains SiO2 and the mol ratio of SiO2 to ATiO3 is approximately 0.0005.
    [19" id="US-20010003361-A1-CLM-00019] 19. A method of producing a semiconducting ceramic material according to
    claim 10 , wherein A is Ba.
    [20" id="US-20010003361-A1-CLM-00020] 20. A method of producing a semiconducting ceramic material according to
    claim 10 wherein A is Ba and Sm.
    类似技术:
    公开号 | 公开日 | 专利标题
    CN101489952B|2013-05-01|Dielectric ceramic, ceramic electronic component, and laminated ceramic capacitor
    KR100475347B1|2005-03-10|Dielectric ceramic composition and capacitor using the same
    US7872854B2|2011-01-18|Semiconductor ceramic, monolithic semiconductor ceramic capacitor, method for manufacturing semiconductor ceramic, and method for manufacturing monolithic semiconductor ceramic capacitor
    KR100414331B1|2004-01-07|Nonreducing dielectric ceramic and monolithic ceramic capacitor using the same
    US6544443B2|2003-04-08|Semiconducting ceramic material and electronic part employing the same
    KR101380132B1|2014-04-04|Dielectric ceramic and laminated ceramic capacitor
    KR100466073B1|2005-01-13|Dielectric Composition Having Improved Homogeneity And Insulation Resistance, Preparing Method Thereof And Multilayer Ceramic Condenser Using The Same
    KR101973421B1|2019-04-29|Dielectric ceramic composition and electronic device using the same
    US5361187A|1994-11-01|Ceramic dielectric compositions and capacitors produced therefrom
    KR100366180B1|2002-12-31|Semiconducting Ceramic Material, Process for Producing the Ceramic Material, and Thermistor
    TWI452586B|2014-09-11|Dielectric ceramics and laminated ceramic capacitors
    JP2915217B2|1999-07-05|Dielectric porcelain and porcelain capacitor
    JP2003104774A|2003-04-09|Dielectric porcelain composition and capacitor using the same
    JP3166787B2|2001-05-14|Barium titanate-based semiconductor porcelain composition
    JP2660010B2|1997-10-08|High dielectric constant porcelain composition and ceramic capacitor
    KR102064105B1|2020-01-08|Dielectric ceramic composition and electronic device using the same
    WO2020240986A1|2020-12-03|Dielectric ceramic composition and ceramic capacitor
    JPH06208806A|1994-07-26|Dielectric material and ceramic component
    US20220028614A1|2022-01-27|Dielectric ceramic composition and ceramic capacitor
    US9601275B1|2017-03-21|Dielectric ceramic composition and electronic device using the same
    JP3319471B2|2002-09-03|Laminated semiconductor porcelain for PTC thermistor and method of manufacturing the same
    JPH05198406A|1993-08-06|Barium titanate based semiconductor porcelain composition
    JP2004075452A|2004-03-11|Dielectric ceramic composition and ceramic capacitor
    JPH06251903A|1994-09-09|Laminated semiconductor ceramic having positive temperature characteristic of resistance
    JP2872513B2|1999-03-17|Dielectric porcelain and porcelain capacitor
    同族专利:
    公开号 | 公开日
    KR100366324B1|2002-12-31|
    DE10058025A1|2001-06-28|
    CN1198289C|2005-04-20|
    US6544443B2|2003-04-08|
    JP2001167904A|2001-06-22|
    KR20010062273A|2001-07-07|
    CN1305195A|2001-07-25|
    GB0028142D0|2001-01-03|
    TW502260B|2002-09-11|
    GB2364303A|2002-01-23|
    GB2364303B|2002-05-22|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US6984355B2|1999-11-02|2006-01-10|Murata Manufacturing Co., Ltd.|Semiconducting ceramic material, process for producing the ceramic material, and thermistor|
    WO2007028153A2|2005-09-02|2007-03-08|Hrd Corp.|Catalyst and method for converting low molecular weight paraffinic hydrocarbons into alkenes and organic compounds with carbon numbers of 2 or more|
    WO2012155900A2|2011-05-18|2012-11-22|Forschungszentrum Jülich GmbH|Method for producing a semiconductor ceramic material, semiconductor ceramic material and a semiconductor component|
    CN102976747A|2012-12-04|2013-03-20|广西新未来信息产业股份有限公司|Lithium niobate doped barium titanate based positive temperature coefficient resistance material and preparation method thereof|
    CN109761602A|2019-02-28|2019-05-17|华中科技大学|A kind of low-resistance thermal sensitive ceramic material and the preparation method and application thereof|US4022716A|1973-04-27|1977-05-10|Tdk Electronics Company, Limited|Semiconducting ceramics containing vanadium oxide|
    EP0256405B1|1986-08-11|1992-01-08|TDK Corporation|Semiconductive ceramic composition|
    US4767732A|1986-08-28|1988-08-30|Kabushiki Kaisha Toshiba|High dielectric constant ceramic material and method of manufacturing the same|
    JP2733667B2|1988-07-14|1998-03-30|ティーディーケイ株式会社|Semiconductor porcelain composition|
    JP3245984B2|1992-07-24|2002-01-15|株式会社村田製作所|Barium titanate-based semiconductor porcelain having a negative resistance temperature characteristic and method of manufacturing the same|
    DE59406312D1|1993-10-15|1998-07-30|Abb Research Ltd|Composite|
    JP3319314B2|1996-11-20|2002-08-26|株式会社村田製作所|Barium titanate-based semiconductor porcelain composition|
    JP3608599B2|1997-10-09|2005-01-12|株式会社村田製作所|Barium titanate semiconductor porcelain|
    JP3039511B2|1998-04-13|2000-05-08|株式会社村田製作所|Semiconductor ceramic and semiconductor ceramic element|
    KR100279512B1|1998-05-08|2001-02-01|정웅기|Composition for Constant Temperature Coefficient Thermistor|
    JP2000095562A|1998-07-24|2000-04-04|Murata Mfg Co Ltd|Raw material composition for positive temperature coefficient thermistor, porcelain for positive temperature coefficient thermistor, and production of its porcelain|EP1876157A4|2005-04-28|2011-10-26|Hitachi Metals Ltd|Semiconductor porcelain composition and process for producing the same|
    US9159476B2|2011-02-01|2015-10-13|Hewlett-Packard Development Company, L.P.|Negative differential resistance device|
    CN102509601B|2011-10-12|2014-05-07|华中科技大学|Preparation method of barium titanate PTCceramic|
    WO2014017365A1|2012-07-25|2014-01-30|株式会社村田製作所|Laminated ptc thermistor element|
    CN102887704B|2012-10-09|2014-02-12|天津大学|Lead-free high-Curie temperature PTCRceramic material and preparation method thereof|
    CN111971759A|2018-04-17|2020-11-20|阿维科斯公司|Varistor for high temperature applications|
    法律状态:
    2000-12-05| AS| Assignment|Owner name: MURATA MANUFACTURING CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:NIIMI, HIDEAKI;ANDO, AKIRA;KAWAMOTO, MITSUTOSHI;AND OTHERS;REEL/FRAME:011338/0122;SIGNING DATES FROM 20001128 TO 20001130 |
    2003-03-19| STCF| Information on status: patent grant|Free format text: PATENTED CASE |
    2006-09-15| FPAY| Fee payment|Year of fee payment: 4 |
    2010-09-09| FPAY| Fee payment|Year of fee payment: 8 |
    2014-09-10| FPAY| Fee payment|Year of fee payment: 12 |
    优先权:
    申请号 | 申请日 | 专利标题
    JP35030699A|JP2001167904A|1999-12-09|1999-12-09|Semiconductor ceramic and electronic device using the same|
    JP11-350306||1999-12-09||
    [返回顶部]