专利摘要:
A method and circuit for generating a pseudo-error signal comprising a demodulator circuit for demodulating an input signal; a first discriminator circuit for regenerating a first digital data signal by discriminating the output of the demodulator circuit; a noise extracting means for extracting a noise component from the input signal; an adding circuit for adding the output of the noise extracting means and the output of the demodulator circuit; a second discriminator circuit for regenerating a second digital data signal by discriminating the output of the adding circuit, and; an exclusive OR circuit for recognizing whether or not the first digital data signal coincides with the second digital data signal.
公开号:SU1246907A3
申请号:SU823397900
申请日:1982-02-19
公开日:1986-07-23
发明作者:Курихара Хироси;Като Тадаеси;Такенака Садао
申请人:Фудзицу Лимитед (Фирма);
IPC主号:
专利说明:

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The invention relates to pseudo-error signal generation devices for controlling the error rate in a digital modulation system with a carrier frequency, in particular in a receiving unit that is used in a he-phase communication system with phase shift manipulation or in a multi-level communication system with amplitude modulation with division into steps.
The purpose of the invention is to increase the accuracy of forming a pseudo-error signal.
The drawing shows a structural electrical circuit of a device for generating a pseudo-error signal.
The proposed device comprises a pseudo-signal pseudo-phase demodulation detector 1, a control unit 2, a low-pass filter 3 (LPF), a voltage-controlled oscillator 4, an amplifier 5, a summator 6, the first 7 and second 8 discriminators, and an IS element KEY or 9.
The device for generating a pseudogrip signal works as follows.
The input signal with phase shift manipulation is fed to the detector input 1 of four-phase pseudo-signal demodulation and, after detection, is processed in the second discriminator 8, to the other input of which the clock signals are pulsed.
In addition, the input signal enters the circuit, consisting of series-connected control unit 2, low-pass filter 3, and voltage controlled generator 4, where it is regenerated. Moreover, the control unit 2 generates a signal that is proportional to the phase difference between the prism and the regenerated signal or which is proportional to the sine O (where O is the phase difference). The error signal generated in control unit 2 is applied to a voltage controlled oscillator 4 as a control signal after the noise in the indicated error signal has been filtered out of the low pass filter 3, as a result of which the voltage controlled oscillator 4 generates a signal with the same frequency as the control signal.
Amplifier 5 amplifies the interference component coming from the output of the block.
2 controls that are fed to one input of the adder 6, to the other input of which a signal is output from the detector 1 of a four-phase pseudo-demodulation signal. From the output of the adder 6, the signal is fed to the input of the first discriminator 7 5 and a clock signal is sent to the other input of the rigo.
I The output signals of the first 7 and second 8 discriminators are the same in the case when the interference component is absent. However, since the interfering signal is from
the amplifier 5 through the adder 6 to the input of the first discriminator 7, the error rate of the output signal of the first discriminator 7 is greater than the error rate of the output signal of the second discriminator 8 do not match, the output signal is EXIT
The control unit 2 generates a signal that corresponds to the phase difference between the input signal and the output of the voltage controlled oscillator 4} and includes a constant component corresponding to the specified phase difference, and an interference component which is proportional to the interference or distortion contained in the input signal.
The output signal generated by the control voltage of the generator 4 does not contain; “It is neither a noise, nor a distortion. Consequently, the input signal supplied to the input of the first discriminator 7 contains a modulating signal and an interference component proportional to the interference or distortion in the input signal. The error rate of the output signal of the first discriminator 7 increases when the interference and distortion in the input signal becomes greater . Therefore, the error rates of the output signals of the first 7 and second 8 discriminators always have a correlation coefficient.
When an error is generated in the signal pulse, a binary value signal is generated at the output of the element SPARING OR 9.
权利要求:
Claims (1)
[1]
DEVICE FOR FORMING A PSEUDER SIGNAL BY using a signal of the main frequency band containing two discriminators, the outputs of which are connected to the corresponding ones. the inputs of the element are EXCLUSIVE OR, characterized by the fact that, in order to increase the accuracy of the formation of the pseudo-error signal, it contains> 8 ----------->
a four-phase pseudo-signal demodulation detector, a series-connected control unit, a low-pass filter, a voltage-controlled generator and a series-connected amplifier and adder are given, the signal input of the four-phase pseudo-signal demodulation detector combined with the input of the control unit, to the control input of which and to the control input of the four detector - the phase 'demodulation of the pseudo signal is connected to the output of the voltage controlled oscillator, the output of the control unit is connected to the input of the amplifier, in course of the adder is connected to the input of the first discriminator, four phase detector output demodulation psevdosigna- la is connected to the input of the second discriminator and a second input of the adder, wherein the second inputs of the first and second discriminators filed demodulating signals.
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SU. B , 1246907 AZ
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同族专利:
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SU1299527A3|1987-03-23|
SU1329631A3|1987-08-07|
DE2921089C3|1981-10-15|
SU1306487A3|1987-04-23|
CA1125404A|1982-06-08|
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JPS54152802A|1979-12-01|
DE2921089A1|1979-11-29|
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IT1114016B|1986-01-27|
FR2428948B1|1984-04-27|
IT7922906D0|1979-05-23|
US4247938A|1981-01-27|
JPS5756983B2|1982-12-02|
DE2921089B2|1980-12-04|
AU541344B2|1985-01-03|
引用文献:
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US3665394A|1970-09-23|1972-05-23|Gte Automatic Electric Lab Inc|Data error detector for determining the error rate prior to equalization|
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法律状态:
优先权:
申请号 | 申请日 | 专利标题
JP53061835A|JPS5756983B2|1978-05-23|1978-05-23|
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