• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:

    公开号:SU1233821A3
    申请号:SU823484350
    申请日:1982-08-26
    公开日:1986-05-23
    发明作者:Пьер Кердонкюфф Ги；Акри Провандье Жак
    申请人:Сосьете Аноним Де Телекоммюникасьон (Фирма)；
    IPC主号:
    专利说明:

    f
    The invention relates to a multichannel communication, in particular, to the use of signals in systems with pulse-code modulation,.
    The purpose of the invention is to increase the reliability of reception by recognizing spurious frequencies.
    FIG. 1 shows a functional electrical circuit of a digital receiver of multi-frequency signals in systems with a pulse code modulation; Fig. 2 shows a signal recognition unit.
    The digital receiver of multi-frequency signals in systems with pulse-dose modulation contains the first buffer register 1, the equalizer 2, the second buffer register 3, the adder 4, block 5 of the programmed memory, the third buffer register 6, the arithmetic block 7, the block 8 operational memory, block 9 addressing, block 10 buffer memory, fourth .1 1 and fifth 12 buffer registers, node 13 signal processing, sixth buffer register 4j, block 15 of memory, block 16 normalization, block 17 squaring, block 18 adding, the seventh buffer register 19 encoding unit 20, a signal recognition unit 21, a binary number order determining unit 22, a RAM element 23, an addition element 24, a first buffer register element 25, a comparison element 26, a sequence memory element 27, a permanent memory element 28, a second buffer register element : m 29 and threshold detector 30.
    A digital receiver of multi-frequency signals in systems with pulse-code modulation works in a trace way.
    The incoming digital signal, formed from sample values E, is entered into the first buffer register I and then converted into a logarithmic code using corrector 2, which outputs the amplitude of the encoded signal according to a linear law log E. These sample values of (EU) Log Ef 5 coming out of corrector 2, is fed to the input of the second buffer register 3 and form cross-correlation integrals between the incoming sequence EW and the reference signals calculated from a finite number of sample values.
    five
    0
    38
    s
    five
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    five
    S
    0
    212
    The sample time limit values of W and the reference signal 1 depend on the code being processed and are, therefore, 5 system data. The product L W R ,, encoded in logarithmic form is entered into block 10, Block 9 of the addressing, containing the information of the distribution of the channels J, is addressed by block 10, i.e. indicates the alarm code present on channel B,
    (Consequently, the functions of mutual correlation (D1 tions are expressed:
    K -ZIK I: E, (W, .RJ,
    The product E, DU R) is ignored.
    hb
    tacles using logarithmic and exponential functions:
    E., L ex: p {Log E + Log L),
    therefore, Log K C (Ej) + Log L, Selective Log values are extracted from block 10 by scanning the addresses and input to the fourth buffer register 11,
    Cji MMaTop 4B call momentum sums sample values C (E) and Log Ii, j out of the second 3 and fourth 11 buffer registers, and outputs -X С (Е) + Log L, Block 5 receives this is a selective value of Y. and at the output a sample value of K, for example, K exp (X,), Outgoing Signal K | in accordance with the invention, 1 1 to 2 duplicates are coded. Indeed, the corrector 2 receives 7 binary units of the EH code-pulse modulation signal, representing 1 absolute magnitude amplitude value. Logarithmic app: imaging requires 8 binary units. The reference sample values contained in block 10. are also encoded using 8 binary units. The storage capacity required for the system processing the 4 types of codes, and the integration function with i 28 options, is 8 K words from 8 binary units.
    Adder 4 gives the logarithm of the output of the incoming and reference signals and the encoder in 9 binary units. Since the product is expressed in P2. This allows us to limit the memory of block 5, which implements the operation exp 2-2, and to encode a linearly exponential function in M binary units. This exponential is realized with the help of: a program, a calculated accumulator for 512 spas from 1 binary units, Results K are fed to the input of the third
    h
    buffer register b.
     Mutual Correlation FunctionsXlE L

    For each sinusoidal, cosine-shaped functions, are performed with a number of arithmetic unit 7, which delivers the result, encoded in 16 binary units, to a unit with a frequency of clock pulses. This block 8 has a capacity of 512 words of 16 binary units, corresponding to 16 cross-correlation functions calculated by 16 binary units for 32 channels processed sequentially. Fifth buffer register 12 stores the intermediate results extracted from block 8, and again supplies them to the input of the arithmetic unit 7.
    The calculated values are extracted from block 8 and fed to node 13.
    The characteristic values of V (f) are expressed as the square of the cross-correlation functions A and B associated with frequency. Node 13 contains the sixth buffer register 14, containing the values A. and Bj, provided by the memory for the channel. Values A and B undergo a normalization operation, which reduces the number of binary units that represent each cross-correlation function.
    For this purpose, the largest power of 2 is determined, which is present in the complex of values A and B. Let this degree of N be 2, then N is called the degree of normalization.
    Block 22 determines the largest degree 2 based on the values of A. and B, derived from the sixth buffer register 14, and outputs this result to the input of block 16 itself normalized-1. This block 16 also receives the values of A and B, issued by the six buffer register 14, and outputs the values of d and, encoded in eight binary units and subtracted from A. and B-; on co I
    relationship
     , 2
    AT;
    / 3, - 2 -i Suppose that a - and / i, A and Bj are normalized. Block 17 receives these normalized values, which are derived from block 16, and outputs iix square. This conversion can output a programmed drive with a capacity of 256 words in eight binary units. These squares represent 123382 4
    are on the input of block 18 in combination
    by
    two for each channel i (A. + B.
    five
    0
    Thus, the operation of summation is carried out in two stages: at the first stage, the operation O + A-, pe0 is performed.
    the result of which is placed in the seventh
    buffer register 19, then on the second
     i in step 1, step Aj + Bj is performed,
    placing the result in the seventh buffer register 19 until the end of the calculation moment. This seventh buffer register 19 stores in memory one characteristic value V, which is then fed to the input of the encoder of the skinny unit 20, which converts this value into a logarithmic code.
    The logarithm coding in the post-processing allows comparison of the characteristic values of V (f) by simple calculation. Then the characteristic value V (f;) from block 20 is fed to the input of block 21.
    This block 2 contains element 23,. V (f}, element 28, containing constant O, K, (f), K (f) KLG) and K, DG) used during the passage of the regen algorithm,. element 27, which controls the unit, depending on the results obtained at the output of element 26, and outlines the addresses of elements 28 and 23.
    The first is a series of comparisons: With essential electronic log; 26, determines the largest sHii ieiHie of all the characteristic values given by element 23. With 11, the last
    to the input element 26 by means of the second buffer register ele egg 29. The values of V (f), also assigned by element 23, are fed to the input of element 24, which takes a constant O from element 28 during this first phase of comparison. Element 24 is connected with element 26 by means of the first buffer register element 25.
    As soon as element 26 determines the largest characteristic
    the value of V (f), this value is entered into the first buffer register element 25. The values of Y (f - l), V (f. + 1), V (f. -2) and V (f - +2), extracted from the first buffer register element 25, are compared to V (f). The differences are measured and compared with the constants K), K (|), Kj (::) and K ,, (f,) given by
     element 28. If the differences are larger and meet the described recognition criterion, then element 26 gives the result to the input of element 27, which indicates confirmation of the detected frequency f corresponding to the maximum V (f,).
    This result is confirmed by a threshold detector 30, which, when 233 & 2
    The largest input 2 is on par., Threshold detector 30 controls Vff levels,);
    1 / do they correspond to the dynamics, for,; this specification, and confirms the result at the input of the element 27, which, at the output, issues an outgoing 1-1
    V (-r, ..
    II
    u
    22
    eleven
    J 21
    .2
    权利要求:
    Claims (2)
    [1]
    1. A DIGITAL RECEIVER OF MULTIFREQUENCY SIGNALS IN SYSTEMS WITH A PULSE-CODE MODULATION, comprising serially connected first buffer register, corrector, second buffer register, adder, programmed memory block, third buffer register, arithmetic block and fourth memory block, as well the output of which is connected to the second input of the adder, and the fifth buffer register, the input of which is connected to the output of the RAM block, and the output with the second input of the arithmetic block, characterized in that o, in order to increase the reliability of reception by recognition of spurious frequencies, a series-connected addressing unit and a buffer memory block are introduced into it, the output of which is connected to the input of the fourth buffer register, while the second input of the buffer memory block is an input of reference signals, and the output of the RAM block connected to a signal processing unit containing a sixth buffer register, a memory unit, a normalization unit, a squaring unit, an addition unit, a seventh buffered register register connected in series , a coding unit and a signal recognition unit, as well as a binary number order determination unit, the input of which is connected to the input of the memory unit, and the output, to the second inputs of the normalization unit and the recognition unit, and the output of the seventh buffer register is connected to the second input of the addition block.
    [2]
    2. Digital receiver according to π. 1, about t and h and yuy g; The reason is that the signal recognition unit contains a serially connected RAM element, an addition element, a first buffer register element, a comparison element and a sequence memory element, the output of which is connected to the input of the permanent memory element and the input of the RAM element, the output of which is through the second buffer register element is connected to the second input of the comparison element, while the output of the permanent memory element is connected to the second input of the addition element, and the second input of the memory element after connected to the output of the threshold detector.
    SU <, „1233821 ί 12
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    同族专利:
    公开号 | 公开日
    EP0073719B1|1985-04-17|
    FR2512306A1|1983-03-04|
    EP0073719A1|1983-03-09|
    DE3263138D1|1985-05-23|
    US4570235A|1986-02-11|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    FR1603175A|1968-07-30|1971-03-22|
    FR2299769B1|1975-01-31|1980-12-05|Telecommunications Sa|
    FR2424669B1|1978-04-27|1980-09-19|Materiel Telephonique|
    NL7903346A|1979-04-27|1980-10-29|Bell Telephone Mfg|DIGITAL SIGNALING SYSTEM.|
    US4328398A|1979-05-22|1982-05-04|Oki Electric Industry Co., Ltd.|Digital multi-frequency receiver|
    US4354248A|1979-11-28|1982-10-12|Motorola, Inc.|Programmable multifrequency tone receiver|
    US4302817A|1980-02-14|1981-11-24|Motorola, Inc.|Digital Pseudo continuous tone detector|
    US4363100A|1980-10-28|1982-12-07|Northern Telecom Limited|Detection of tones in sampled signals|
    US4399536A|1981-10-02|1983-08-16|Bell Telephone Laboratories, Incorporated|Convolution filter arrangement for digital multifrequency receiver|US4696031A|1985-12-31|1987-09-22|Wang Laboratories, Inc.|Signal detection and discrimination using waveform peak factor|
    DE3831047C2|1988-09-12|1992-10-08|Siemens Nixdorf Informationssysteme Ag, 4790 Paderborn, De|
    US6429659B1|2000-03-09|2002-08-06|General Electric Company|Connection tester for an electronic trip unit|
    US6993594B2|2001-04-19|2006-01-31|Steven Schneider|Method, product, and apparatus for requesting a resource from an identifier having a character image|
    US7774394B2|2006-08-18|2010-08-10|Infineon Technologies Ag|Exponentiated polyphase digital filter|
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    FR8116351A|FR2512306A1|1981-08-27|1981-08-27|DIGITAL FREQUENCY RECOGNITION DEVICE|
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