专利摘要:
PURPOSE: To provide a semiconductor device wherein a plurality of semiconductor chips are formed on a substrate for sure insulation. CONSTITUTION: In the semiconductor device, a first semiconductor chip 1 and a second semiconductor chip 2 are formed on the substrate 7, and electrode terminals 21 formed on the semiconductor chips 1 and 2, respectively, are electrically connected with the substrate 7 through first bonding wires 3 and second bonding wires 4. An insulating layer 5 is formed between the second bonding wires 4 and the first semiconductor chip 1.
公开号:KR20020062857A
申请号:KR1020020004305
申请日:2002-01-24
公开日:2002-07-31
发明作者:후꾸이야스끼;나라이아쯔야
申请人:샤프 가부시키가이샤;
IPC主号:
专利说明:

Semiconductor device and manufacturing method therefor {SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF}
[30] BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device for laminating and mounting a plurality of semiconductor chips in a single package and a method of manufacturing the same.
[31] In recent years, by mounting a plurality of semiconductor chips (semiconductor elements) in a single package, miniaturization and high performance of semiconductor devices have been attempted. For example, there is a package in which a plurality of semiconductor chips are stacked and mounted for the purpose of adding added value or increasing memory capacity to a memory mounted in a portable device or the like.
[32] The semiconductor device includes a semiconductor chip and a substrate. As a method of electrically connecting both, the wire bonding method which connects using a bonding wire is widely used.
[33] When the wire bonding method is used for the connection of the semiconductor chip and the substrate, it is required not to damage the wire bonded portion of the semiconductor chip already mounted on the substrate when the semiconductor chips are stacked. That is, when the chip size of the stacked semiconductor chip is smaller than the chip size of the semiconductor chip mounted on the substrate, the wire bonded portion is not damaged, but when the chip sizes of both are almost the same, the wire bonding described above. Since the part overlaps with the stacked semiconductor chips, there is a problem that it is particularly easy to be damaged.
[34] In order to solve the above problem, a semiconductor device (see USP Re. 36,613) which encloses a spacer of about 200 μm (0.008 inch) between stacked semiconductor chips, the peripheral portion is formed thinner than the center portion, Semiconductor device having a structure (see Japanese Patent Application Laid-open No. Hei 6-244360 (published September 2, 1994)), and a semiconductor device which is laminated by interposing an adhesive layer between semiconductor chips (Japanese Patent Laid-Open No. 10-27880). (Published January 27, 1998).
[35] However, the following problems arise in the above conventional semiconductor devices, respectively.
[36] A semiconductor device having a structure in which a spacer is enclosed between the stacked semiconductor chips includes a spacer having a sufficient thickness to prevent contact between a bonding wire connected to a semiconductor chip mounted on a substrate and a semiconductor chip stacked thereon. Should be used. Therefore, there is a problem unsuitable for thinning of a package.
[37] That is, as shown in FIG. 13, in order to prevent the contact of the 2nd bonding wire 4 which connects the 2nd semiconductor chip 2 and the board | substrate 7, and the 1st semiconductor chip 1, the spacer 14 ) Should be of sufficient thickness. In other words, as shown in FIG. 14, when the thickness of the spacer 14 is approximately equal to the height from the second semiconductor chip 2 to the highest portion of the second bonding wire 4, the second bonding wire ( The contact between 4) and the first semiconductor chip 1 causes a problem of insufficient insulation between them.
[38] In addition, as shown in FIG. 13, the first semiconductor chip 1 is overhanged. In other words, the first semiconductor chip 1 protrudes from the spacer 14. Therefore, vibration tends to occur in the first semiconductor chip 1. Here, in the wire bonding method of electrically connecting a semiconductor chip and a board | substrate, two connection processes are performed in order to connect the both ends of a bonding wire, and a 2nd connection is performed by ultrasonic vibration. As described above, since vibration easily occurs on the first semiconductor chip 1, it is difficult to connect the first bonding wire 3 to the first semiconductor chip 1 side by ultrasonic vibration. As a result, in the wire bonding method, after connecting the one end part of the 1st bonding wire 3 to the 1st semiconductor chip 1 side, it is necessary to connect the other end part to the board | substrate 7 side.
[39] That is, only a forward wire bonding method can be adopted as the wire bonding method for the first semiconductor chip 1 mounted on the spacer 14. Therefore, compared with the case where the reverse wire bonding method is adopted, it is required to arrange the wire bonding terminal on the side of the substrate 7 outside the substrate. For this reason, it becomes difficult to miniaturize a package. The forward wire bonding method refers to a method of connecting a bonding wire and a substrate after connecting a semiconductor chip and a bonding wire, and a method of connecting in the reverse order is called a reverse wire bonding method.
[40] As shown in Fig. 15, in the case of a semiconductor device having a stepped structure in which the peripheral portion of the semiconductor chip is thinner than the center portion, the step is formed in addition to the step of cutting the semiconductor chip in comparison with the conventional process. To this end, a cutting process for cutting semiconductor wafers is required. In this cutting step, it is necessary to protect the side facing the surface on which the cutting is performed, that is, the side on which the element of the semiconductor chip is formed. For this reason, the problem that manufacturing cost increases is caused.
[41] In the semiconductor device, a process for insulation is not performed on a portion having a step of the ninth semiconductor chip 51. Therefore, as shown in FIG. 16, when the package is thinned, the second bonding wire 4 and the ninth semiconductor chip 51 come into contact with each other, resulting in a problem of insufficient insulation between them. In addition, when the ninth semiconductor chip 51 is thinned, a portion having a step is also thinned and its strength is weakened, which causes a problem that defects such as chip cracking tend to occur.
[42] As a wire bonding method for connecting a semiconductor chip having a stepped structure and a substrate, only a forward wire bonding method can be employed, similarly to a structure in which spacers are enclosed between stacked semiconductor chips. When the forward wire bonding method is used, the height of the bonding wire from the semiconductor chip to which the bonding wire is connected cannot be reduced. Therefore, when the semiconductor chip is mounted in multiple layers, it becomes difficult to reduce the thickness of the semiconductor device.
[43] In addition, as described above, since only the forward wire bonding method can be adopted, it is required to arrange the wire bonding terminal on the side of the substrate 7 outside the substrate 7 more than when the reverse wire bonding method is adopted. do. Therefore, it becomes difficult to miniaturize a package.
[44] As shown in FIG. 17, in the case of the structure in which the semiconductor chips are laminated with an adhesive layer interposed therebetween, the thickness and the area of the adhesive layer 6 adhering the first semiconductor chip 1 and the second semiconductor chip 2 are controlled. It is difficult. This causes problems such as contamination of the substrate 7 due to bleeding of the adhesive constituting the adhesive layer 6, generation of a tilt in the laminated first semiconductor chip 1, and the like.
[45] In particular, when the semiconductor chip is multilayered, stable production is difficult because the height variation of the semiconductor device, the height variation from the substrate to the surface of the uppermost semiconductor chip, the inclination of the uppermost semiconductor chip, and the like increase. That is, in the case where the number of stacks is two, the above-mentioned deviation and inclination do not become a big problem, but as the number of stacked semiconductor chips increases to three or four, the height deviation and inclination increase, so that the semiconductor device is stable. This leads to a problem of difficulty in production.
[46] In addition, as shown in FIG. 18, when the package of the semiconductor device is thinned, a problem arises in that the insulation between the second bonding wire 4 and the first semiconductor chip 1 becomes insufficient.
[47] The present invention has been made to solve the above problems, and an object thereof is to provide a semiconductor device having an insulating property and a method of manufacturing the same, which can be stacked regardless of the chip size of the semiconductor chip.
[1] 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention.
[2] 2 is a cross-sectional view of a semiconductor device in which bonding wires are connected using a forward wire bonding method according to another embodiment of the present invention.
[3] 3 is a cross-sectional view of a semiconductor device manufactured by laminating four semiconductor chips according to still another embodiment of the present invention.
[4] 4 is a cross-sectional view of a semiconductor device manufactured by sealing with a sealing resin according to still another embodiment of the present invention.
[5] 5 is a perspective view showing a step of attaching a sheet according to the method of manufacturing a semiconductor device of the present invention.
[6] 6 is a cross-sectional view showing a step of dividing according to the method of manufacturing a semiconductor device of the present invention.
[7] 7 is a cross-sectional view showing the step of adhering according to the method of manufacturing a semiconductor device of the present invention.
[8] 8 is a cross-sectional view of a semiconductor device according to still another embodiment of the present invention.
[9] 9 is a cross-sectional view of a semiconductor device in which an insulating resin layer is formed in a region other than a region in which an electrode terminal is disposed, on a surface on which an electrode terminal of a semiconductor chip is formed, according to another embodiment of the present invention.
[10] 10 is a cross-sectional view showing an example of a combination of semiconductor chips forming a semiconductor device according to the present invention.
[11] 11 is a plan view illustrating an example of a combination of semiconductor chips forming a semiconductor device according to the present invention.
[12] 12 is a plan view showing an example of a combination of semiconductor chips forming a semiconductor device according to the present invention.
[13] Fig. 13 is a sectional view of a conventional semiconductor device having a structure in which spacers are sealed between stacked semiconductor chips.
[14] Fig. 14 is a cross-sectional view showing a case where a conventional semiconductor device having a structure in which spacers are enclosed between stacked semiconductor chips is thinned.
[15] Fig. 15 is a cross-sectional view showing a conventional semiconductor device having a stepped structure in which a semiconductor chip peripheral portion is formed thinner than a central portion.
[16] Fig. 16 is a cross-sectional view showing a case where a conventional semiconductor device having a stepped structure is thinned in which a peripheral portion of a conventional semiconductor chip is thinner than a central portion.
[17] 17 is a cross-sectional view showing a conventional semiconductor device having a structure in which a semiconductor layer is laminated with an adhesive layer interposed therebetween.
[18] Fig. 18 is a cross-sectional view showing a case where a conventional semiconductor device having a structure formed by laminating an adhesive layer between respective semiconductor chips is thinned.
[19] ※ Explanation of codes for main parts of drawing
[20] DESCRIPTION OF SYMBOLS 1 First semiconductor chip 2 Second semiconductor chip
[21] 3: first bonding wire 4: second bonding wire
[22] 5: insulation layer 6: adhesive layer
[23] 7: substrate 13: coating resin (insulating resin layer)
[24] 15: sealing resin 16: terminal for external connection
[25] 18: third semiconductor chip 20: fourth semiconductor chip
[26] 21 electrode terminal 22 sheet
[27] 23 Bump 31 Fifth Semiconductor Chip
[28] 32: sixth semiconductor chip 41: seventh semiconductor chip
[29] 42: eighth semiconductor chip 51: ninth semiconductor chip
[48] SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device having an insulating property which can be stacked regardless of the chip size of a semiconductor chip and a method of manufacturing the same.
[49] In order to achieve the above object, a semiconductor device and a method of manufacturing the same according to the present invention divide (cut) a semiconductor wafer by dicing in a state in which two layers of resin layers comprising an insulating layer and an adhesive layer are attached to the semiconductor wafer. The method of laminating | stacking a semiconductor chip is used.
[50] As a result, it is possible to mass-produce a semiconductor device having a small external dimension and ensuring insulation. In the semiconductor device, the bonding wire portion need not be avoided when the semiconductor chips are stacked. Therefore, the semiconductor chip can be stacked regardless of the chip size.
[51] In order to achieve the above object, the semiconductor device according to the present invention includes a plurality of semiconductor chips stacked on a substrate and electrode terminals disposed on each semiconductor chip, and electrically connects the electrode terminals to the substrate by bonding wires. A semiconductor device connected with
[52] An insulating layer is formed between a bonding wire and the semiconductor chip laminated | stacked on the semiconductor chip to which this bonding wire was connected.
[53] By the above configuration, it is possible to prevent the bonding wire and the semiconductor chip from contacting each other. Therefore, the insulation of the semiconductor device formed by laminating a plurality of semiconductor chips can be ensured.
[54] In a semiconductor device in which a plurality of semiconductor chips are stacked, the semiconductor chips stacked on the substrate are electrically connected to the substrate by bonding wires through electrode terminals formed on the respective semiconductor chips. Here, in order to secure insulation of the semiconductor device, it is necessary to prevent the contact between the bonding wire and the semiconductor chip. In particular, in order to reduce the size of the semiconductor device, the distance between the semiconductor chips must be reduced. In this case, since the distance between the bonding wire and the semiconductor chip is reduced, both of them can be easily contacted, resulting in insufficient insulation.
[55] Therefore, by forming an insulating layer between the bonding wire and the semiconductor chip to which the bonding wire is connected, it is possible to prevent the bonding wire and the semiconductor chips stacked adjacent thereto from contacting each other. In other words, an insulating layer is formed between the electrode terminal to which the bonding wires on the semiconductor chip are connected and the semiconductor chip adjacent to the semiconductor chip, whereby the bonding chip and the semiconductor chip adjacent to the semiconductor chip to which the bonding wire is connected. It can prevent the contact with.
[56] As a result, the insulation of the semiconductor device formed by laminating a plurality of semiconductor chips can be secured. For example, even when the semiconductor device is made thin by reducing the distance between the stacked semiconductor chips, the insulating layer can prevent contact between the semiconductor chip and the bonding wire, thereby ensuring insulation of the semiconductor device.
[57] As described above, in a semiconductor device in which a plurality of semiconductor chips are stacked on a substrate, insufficient insulation between the bonding wire and the semiconductor chip can be prevented. That is, since the contact between them is prevented by the insulating layer formed between the bonding wire and the semiconductor chip, insulation of the semiconductor device can be ensured.
[58] Therefore, since the insulation of a semiconductor device in which a plurality of semiconductor chips are laminated on a substrate can be ensured, even when the thickness is reduced and the external dimension thereof is reduced, a highly reliable semiconductor device with insulation can be provided.
[59] By the following description, further objects, features and advantages of the present invention will be fully understood. Further advantages of the present invention will become apparent from the following description with reference to the accompanying drawings.
[60] 1-4 is explanatory drawing which shows the structure of the semiconductor device which concerns on this embodiment.
[61] 1 shows a semiconductor device formed by stacking two semiconductor chips. As shown in the figure, the semiconductor device of this embodiment includes a first semiconductor chip 1, a second semiconductor chip 2, a first bonding wire 3, a second bonding wire 4, and an insulating layer ( 5), the adhesive layer 6, the substrate 7, the adhesive layer 8 and the electrode terminal 21. In the present embodiment, when the semiconductor chips stacked on the substrate 7 are not specified, they will be simply referred to as semiconductor chips.
[62] The second semiconductor chip 2 is adhered to the substrate 7 constituting the semiconductor device of the present embodiment through the adhesive layer 8, and on the surface of the second semiconductor chip 2 that faces the substrate 7. The first semiconductor chip 1 is bonded through the insulating layer 5 by the adhesive layer 6. The first bonding wire 3 electrically connects the electrode terminal 21 and the substrate 7 of the first semiconductor chip 1, and the second bonding wire 4 is an electrode of the second semiconductor chip 2. The terminal 21 and the board | substrate 7 are electrically connected. In addition, the electrode terminal 21 is formed on the side opposite to the substrate 7 of the first semiconductor chip 1 and the second semiconductor chip 2.
[63] The type of the semiconductor chip constituting the semiconductor device of the present embodiment is not particularly limited, and any type can be used. Examples of suitable plural semiconductor chips include combinations of ones having the same appearance or combinations of electrode terminals formed at the same positions so that the positions of the electrode terminals formed on the semiconductor chips overlap when stacked. 1 to 4 show a semiconductor device having a configuration in which semiconductor chips of the same appearance are stacked.
[64] 2 shows a semiconductor device having a configuration in which the thickness of the adhesive layer 6 is equal to or less than the height B of the second bonding wire from the surface of the second semiconductor chip 2 on which the electrode terminals 22 are disposed. As shown in the figure, the semiconductor device according to the present embodiment can prevent the contact between them by the insulating layer 5 interposed between the first semiconductor chip 1 and the second bonding wire 4. . That is, the insulating layer 5 can ensure the insulation of the semiconductor device.
[65] 3 shows a semiconductor device on which four stacked semiconductor chips are mounted. As shown in FIG. 3, the semiconductor device includes a second semiconductor chip 2, a first semiconductor chip 1, a third semiconductor chip 18, and a fourth semiconductor chip 20 in order from the substrate 7 side. These are laminated | stacked, and the insulating layer 5 and the contact bonding layer 6 are interposed between these semiconductor chips. As described above, in the case where a plurality of semiconductor chips are stacked, the insulating layer 5 and the adhesive layer 6 are interposed between the semiconductor chips, thereby bonding each semiconductor chip with the adhesive layer 6 and simultaneously insulating layers ( 5), the bonding wire and the semiconductor chip can be prevented from contacting each other.
[66] In order to reduce the size of the semiconductor device formed by stacking semiconductor chips, it is effective to reduce the thickness of the adhesive layer 6 adhering the semiconductor chips. However, when the insulating layer 5 does not exist between the semiconductor chips, the adhesive layer 6 As the thickness of the ()) decreases, the bonding wire and the semiconductor chip may come into contact with each other, thereby preventing the insulation of the semiconductor device from being secured.
[67] However, since the semiconductor device according to the present embodiment can prevent contact between the bonding wire and the semiconductor chip by the insulating layer 5 interposed between the semiconductor chips, even when the thickness of the adhesive layer 6 is reduced. Insulation can be secured.
[68] That is, the insulation of the semiconductor device formed by stacking a plurality of semiconductor chips can be ensured and the thickness can be reduced. In the semiconductor device shown in FIG. 3, the number of stacked semiconductor chips is four, but the number of semiconductor chips is not limited to this, and may be any number.
[69] 4 shows a semiconductor device (hereinafter referred to as a Chip Size Package) sealed with a sealing resin. As shown in FIG. 4, the semiconductor device according to the present embodiment is sealed by the sealing resin 15, and electrically connects the substrate 7 and the outside on the side opposite to the surface on which the semiconductor chip of the substrate 7 is mounted. An external connection terminal (external terminal; 16) is formed for connection. As the sealing resin 15, a thermosetting resin can be used, and specifically, an epoxy resin, a silicone resin, or the like can be preferably used.
[70] The method of manufacturing the semiconductor device according to the present invention will be described with reference to FIGS. 5 to 7.
[71] First, the method of forming an insulating layer and an contact bonding layer on the back surface of a semiconductor chip is demonstrated. In addition, in this embodiment, the surface in which the electrode terminal of a semiconductor chip is formed is shown as the front surface, and the surface in which the electrode terminal is not formed is represented by the back surface.
[72] Formation of an insulating layer and an adhesive layer is performed in the state of the wafer before various elements are formed and become a semiconductor chip. In addition, in the state of a wafer, the back surface can be polished. Since the thickness of the wafer can be reduced by polishing the back surface before forming the insulating layer and the adhesive layer, the semiconductor chip can be further miniaturized.
[73] As a method of forming an insulating layer and an adhesive layer on the back surface of a wafer, as shown in FIG. 5, 2 which consists of an insulating layer 5 and the contact bonding layer 6 on the back surface of the wafer 9 using the sticking roller 10 is shown. The method of attaching the sheet | seat 22 of a layer structure is mentioned. Moreover, the sheet | seat 22 adheres to the back surface of the wafer 9 so that the insulating layer 5 may contact.
[74] Although the sheet | seat 22 which consists of the insulating layer 5 and the contact bonding layer 6 was used in the same figure, independent sheet-like insulating layer 5 and the contact bonding layer 6 can also be attached, respectively. In other words, after the sheet-shaped insulating layer 5 is attached to the back surface of the wafer, the sheet-shaped adhesive layer 6 is further attached thereon to form the insulating layer 5 and the adhesive layer 6 on the back surface of the wafer. have.
[75] It is preferable to form the insulating layer 5 and the contact bonding layer 6 using sheet-like material with a uniform thickness. In this manner, the insulating layer 5 and the adhesive layer 6 having a uniform thickness can be easily formed on the back surface of the wafer 9.
[76] Preferably, as the insulating layer 5, resin which is excellent in heat resistance and little plastic deformation at 100 to 200 degreeC can be used. In more detail, it is preferable that the insulating layer 5 is polyimide-type resin.
[77] In the case where a resin having a large plastic deformation at high temperature is used, there is a possibility that the insulating layer 5 is plastically deformed under high temperature conditions and the insulation of the semiconductor device cannot be secured. On the other hand, by using the resin excellent in heat resistance, since the deformation of the insulating layer 5 can be prevented under high temperature conditions, the insulation of the semiconductor device under high temperature conditions can be ensured.
[78] The thickness of the insulating layer 5 is not particularly limited, as long as the insulating layer 5 can be attached to the back surface of the wafer. However, in consideration of thinning of a semiconductor device (package) formed by stacking a plurality of semiconductor chips, the thickness is preferably in the range of 15 µm or more and 30 µm or less. By making thickness of the insulating layer 5 into the said range, a semiconductor device can be thinned, ensuring the insulation of a semiconductor device.
[79] Moreover, as the adhesive layer 6, a thermosetting resin which is melted into a liquid by a solid by heating and then cured is preferable, and in particular, an epoxy resin is particularly preferable. The adhesive layer 6 has a purpose of sealing and protecting the second bonding wire 4 connected to the electrode terminal 21 of the second semiconductor chip 2 in addition to the function of bonding the semiconductor chips to each other. Therefore, it is preferable that the thickness A (refer FIG. 7) of the contact bonding layer 6 is more than the height (B; see FIG. 7) from the 2nd semiconductor chip 2 of the 2nd bonding wire 4. As shown in FIG.
[80] Referring to FIG. 6, after the insulating layer 5 and the adhesive layer 6 are formed on the back surface of the wafer 9, the dicing blade 11 is used to turn the wafer 9 into individual pieces. Explain how to cut. As shown in the same figure, the wafer 9 in which the insulating layer 5 and the contact bonding layer 6 were formed on the fixing sheet 12 for cutting is arrange | positioned, and it cut | disconnects so that it may become a semiconductor chip using the dicing blade 11. do. As a result, the semiconductor layer can be manufactured by cutting the insulating layer 5, the contact bonding layer 6, and the wafer 9 at once. That is, when cutting the wafer 9 using the dicing blade 11, the insulating layer 5 and the adhesive layer 6 are also cut simultaneously, so that the insulating layer 5 and the same size as the chip size of the semiconductor chip and The semiconductor chip in which the contact bonding layer 6 was formed can be manufactured.
[81] By manufacturing the semiconductor chip using the above method, it is possible to more easily control the adhesive region, the adhesive amount, and the thickness of the adhesive layer formed on the semiconductor chip, as compared with the method of applying the adhesive to form the adhesive layer. .
[82] Hereinafter, with reference to FIG. 7, the method of laminating | stacking the semiconductor chip obtained as mentioned above on a board | substrate, ie, the manufacturing method of a package, is demonstrated. First, as shown in the same figure, the 2nd semiconductor chip 2 is mounted on the board | substrate 7 using an adhesive agent. That is, the second semiconductor chip 2 is mounted on the substrate 7 via the adhesive layer 8 formed by the adhesive.
[83] As the substrate 7, for example, a lead frame having a wire bond terminal or an organic substrate made of polyimide, bismaleimido triazine resin, or the like can be used, but is not limited thereto. Can be used. As an adhesive which forms the said adhesive bond layer 8, a liquid adhesive, a sheet-like adhesive, etc. can be used, for example. In addition, if the said adhesive agent can adhere | attach the whole area | region of the 1st semiconductor chip 1, and the board | substrate 7 uniformly, the kind is not limited.
[84] Next, after mounting the 2nd semiconductor chip 2 on the board | substrate 7, the wire bonding terminal part of the board | substrate 7 and the electrode terminal of the 2nd semiconductor chip 2 by the 2nd bonding wire 4 are carried out. (21) is electrically connected.
[85] Thereafter, the first semiconductor chip 1 is bonded to the second semiconductor chip 2 mounted on the substrate 7. The adhesion is performed so that the adhesive layer 6 covers the portion where the electrode terminal 21 and the second bonding wire 4 are connected on the second semiconductor chip 2.
[86] Preferably, when the adhesion is carried out, the substrate 7 and the second semiconductor chip 2 up to a temperature at which the softening and melting of the epoxy resin constituting the adhesive layer 6 formed on the back surface of the first semiconductor chip 1 starts. ) And the second bonding wire 4 are heated, for example, when the temperature at which softening and melting of the epoxy resin constituting the adhesive layer 6 starts is 100 ° C, the substrate 7 and the second semiconductor chip 2 ) And the second bonding wire 4 are heated to 100 ° C. As a result, since the adhesive layer 6 formed on the back surface of the first semiconductor chip 1 is softened, when bonding the first semiconductor chip 1 and the second semiconductor chip 2, the second bonding wire 4 The two can be bonded without damaging it.
[87] Thereafter, after the thermosetting resin constituting the adhesive layer 6 is completely cured, the wire bonding terminal portion of the substrate 7 and the first semiconductor chip 1 are formed using the first bonding wire 3 (see FIG. 1). The electrode terminal 21 is electrically connected.
[88] As shown in FIG. 8, it is inferred that the first bonding wire 3 and the second bonding wire 4 may contact the peripheral portions of the first semiconductor chip 1 and the second semiconductor chip 2, respectively. Therefore, as shown in FIG. 9, it is preferable to form a coating resin (insulating resin layer; 13) on the side where the electrode terminals 21 of the first semiconductor chip 1 and the second semiconductor chip 2 are formed. Do. The coating resin 13 is for preventing contact between the semiconductor chip and the bonding wire. For example, an insulating resin such as polyimide is used.
[89] As described above, after stacking the semiconductor chip on the substrate, as shown in Fig. 4, the CSP can be obtained by forming the terminal 16 for external connection made of the sealing resin 15 and the solder ball.
[90] When the semiconductor chip is laminated on the substrate, the bonding wire and the semiconductor chip can be (resin) sealed by potting using a liquid resin.
[91] As a method (wire bonding method) for connecting the electrode terminal 21 and the second bonding wire 4 formed on the second semiconductor chip 2, a bump is formed on the electrode terminal 21 and then a reverse wire bonding method. It is effective to thin the semiconductor device. As a result, since the thickness A (refer FIG. 7) of the contact bonding layer 6 can be reduced, it is especially effective for thinning the semiconductor device formed by laminating | stacking many semiconductor chips.
[92] As described above, the thickness A of the adhesive layer 6 is preferably equal to or higher than the height B (see FIG. 7) from the second semiconductor chip 2 of the second bonding wire 4. The height of the bump required for performing the connection by the reverse wire bonding method is the surface of the second semiconductor chip 2 on which the electrode terminal 21 is formed of the second bonding wire 4 connected by the forward wire bonding method. It can be made smaller than the height from (B; see FIG. 7). As a result, the thickness of the adhesive layer 6 can be reduced by performing the reverse wire bonding method after forming the bump 23 (refer FIG. 7) on the electrode terminal 21. FIG.
[93] For example, when the bump is formed so that its height is 40 µm, and the thickness of the insulating layer 5 of the first semiconductor chip 1 is 25 µm and the thickness of the adhesive layer 6 is 50 µm, the insulating layer ( The thickness of the chip | tip laminated part which consists of 5) and the contact bonding layer 6 is 75 micrometers. On the other hand, when the forward wire bonding method is adopted, it is difficult to reduce the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected, so that the thickness of the chip stack is about 130 to 160 µm. .
[94] That is, since the thickness of the chip stack can be reduced by using the reverse wire bonding method as a method of connecting the electrode terminals 21 and the second bonding wires 4, the semiconductor chip is laminated and the semiconductor device is thinned. It is advantageous to Therefore, it is possible to realize lamination of a semiconductor chip that is thinner than the conventional one and has high reliability in which insulation and the like are ensured.
[95] The reverse wire bonding method refers to a method of connecting a semiconductor chip and a bonding wire after connecting a substrate and a bonding wire, and a method of connecting in the reverse order is called a forward wire bonding method. In the case of performing the reverse wire bonding method, metal bumps are formed on an electrode terminal formed on a semiconductor chip, and then the bonding wires are connected to the substrate, and then the bonding wires and the metal bumps are connected.
[96] In the semiconductor device according to the present embodiment, since the insulation between the semiconductor chip and the bonding wire is sufficiently secured by the insulating layer, the chip size of the stacked semiconductor chips is not limited. Therefore, as shown in FIG. 10, the fifth semiconductor chip 31 having a larger chip size than the sixth semiconductor chip 32 may be laminated on the side opposite to the substrate 7 of the sixth semiconductor chip 32. have.
[97] In the semiconductor device according to the present embodiment, since the semiconductor chip can be laminated on the portion to which the bonding wires of the electrode terminals of the semiconductor chip are connected, for example, the plurality of stacked semiconductor chips is arranged in FIG. 11 or 12. Can be arranged in (Layout). Rather than stacking the sixth semiconductor chip 32 on the fifth semiconductor chip 31, the arrangement for connecting the sixth semiconductor chip 32 and the substrate 7 (see FIG. 10) by the arrangement shown in the same figure is provided. There is an advantage that the wire length of the two bonding wires 4 can be reduced.
[98] In particular, as shown in FIG. 11, the sixth semiconductor chip mounted on the substrate 7 (see FIG. 10) so that the second bonding wire 4 is disposed between the fifth semiconductor chip 31 and the substrate 7. By adhering the fifth semiconductor chip 31 larger than the sixth semiconductor chip 32 to the 32, the space between the fifth semiconductor chip 31 and the substrate 7 can be effectively used. Therefore, the semiconductor device can be further miniaturized.
[99] In addition, as shown in FIG. 12, an eighth mounted on the substrate 7 (see FIG. 10) so that a part of the second bonding wire 4 is disposed between the seventh semiconductor chip 41 and the substrate 7. By bonding the eighth semiconductor chip 42 to the seventh semiconductor chip 41 having a different chip size, the space between the seventh semiconductor chip 41 and the substrate 7 can be effectively used. . As a result, the semiconductor device can be miniaturized.
[100] As described above, the semiconductor device according to the present embodiment can, for example, stack a plurality of semiconductor chips having the same chip size without limiting the chip size of the stacked semiconductor chips. Therefore, the semiconductor device which has a thinner and more reliable laminated structure can be provided.
[101] The semiconductor device of the present invention is a semiconductor device in which a plurality of semiconductor chips having a plurality of electrode terminals are laminated on a substrate on each main surface, and the electrode terminals and the substrate are electrically connected by bonding wires, and the semiconductors of the upper and lower portions of arbitrary positions are provided. An adhesive layer made of resin and an insulating layer made of resin are disposed between the lower semiconductor chip and the upper semiconductor chip of the chip in order from the lower layer, and the upper semiconductor chip is adhered to at least a portion of the electrode terminals connected by the bonding wires of the lower semiconductor chip. It can be provided as a first semiconductor device having a constitution.
[102] The first semiconductor device may have a configuration in which bumps are formed on an electrode terminal of a lower semiconductor chip, and a bonding wire connecting the lower semiconductor chip and the substrate is connected by a reverse wire bonding method.
[103] The first semiconductor device may have a structure in which a semiconductor chip and a bonding wire connected to one surface of a substrate are sealed with a resin, and a terminal for external connection is formed on the other side of the substrate.
[104] The first semiconductor device may have a structure in which the insulating layer is made of polyimide resin and the adhesive layer is made of epoxy resin.
[105] The said 1st semiconductor device may have a structure whose thickness of an insulating layer exists in the range of 15 micrometers or more and 30 micrometers or less.
[106] The said 1st semiconductor device may have a structure which is especially coat | covered with insulating resin from the electrode terminal part to a chip | tip end on the main surface of a lower semiconductor chip.
[107] The first semiconductor device may have a structure in which an electrode terminal portion disposed on a lower semiconductor chip is covered with an insulating resin having an opening.
[108] In the method of manufacturing a semiconductor device according to the present invention, in the state of a wafer before dividing into a semiconductor chip, attaching a sheet made of two layers of an insulating resin layer and an adhesive resin layer so that the insulating resin layer is in contact with the back surface of the wafer, the die Dividing the semiconductor chip into a semiconductor chip by bonding, and adhering the divided semiconductor chip onto a semiconductor chip electrically connected to the substrate by a bonding wire.
[109] In the method of manufacturing a semiconductor device according to the present invention, in the state of a wafer before dividing into a semiconductor chip, attaching a sheet-shaped insulating resin layer and a sheet-shaped adhesive resin layer in sequence to the back surface of the wafer, and by dicing the semiconductor Dividing the wafer into chips, and adhering the divided semiconductor chips onto a semiconductor chip electrically connected to the substrate by a bonding wire.
[110] In the semiconductor device according to the present invention, it is preferable that the insulating layer is made of a polyimide resin.
[111] As a polyimide resin, it is preferable to select and use the material which is excellent in heat resistance and little plastic deformation at high temperature. By using the material excellent in heat resistance as a polyimide-type resin, the insulating layer with few plastic deformation at high temperature can be formed. Therefore, by forming the insulating layer from the polyimide resin, the insulating property of the semiconductor device can be further secured under high temperature conditions.
[112] In the semiconductor device according to the present invention, the thickness of the insulating layer is preferably in the range of 15 µm or more and 30 µm or less.
[113] By limiting the thickness of the insulating layer within the above range, it is possible to ensure insulation and to reduce the thickness of the semiconductor device formed by stacking semiconductor chips.
[114] It is preferable that bumps are formed in the electrode terminals of the semiconductor device according to the present invention, respectively, and the bonding wires are connected using a reverse wire bonding method.
[115] With the above configuration, the distance between the stacked semiconductor chips can be reduced. That is, by forming bumps on the electrode terminals, a reverse wire bonding method is used as a method of connecting the electrode terminals and the substrate by bonding wires. It is available. Therefore, the distance between the semiconductor chips can be reduced.
[116] More specifically, when the forward wire bonding method is used as the method for performing the above connection, the height of the bump can be made smaller than the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected via the electrode terminal. . In addition, by using the reverse wire bonding method, the bonding wire can be connected more reliably.
[117] Therefore, since the distance between the stacked semiconductor chips can be reduced, the semiconductor device formed by stacking a plurality of semiconductor chips can be easily thinned. In addition, since the bonding wire can be connected more reliably, a semiconductor device having high reliability can be provided.
[118] The reverse wire bonding method refers to a method of connecting a semiconductor chip and a bonding wire after connecting a bonding wire and a substrate, and a method of connecting in the reverse order is called a forward wire bonding method.
[119] A semiconductor device according to the present invention is a terminal for external connection on a side opposite to a surface on which a plurality of semiconductor chips and bonding wires laminated on a substrate are sealed by a sealing resin and on which the plurality of semiconductor chips of the substrate are laminated. It is preferable to form
[120] Therefore, the semiconductor chip and the bonding wire can be protected by the sealing resin. In addition, the external connection terminal makes it easy to electrically connect the semiconductor device with the outside.
[121] In the semiconductor device according to the present invention, it is preferable to form an adhesive layer between the plurality of semiconductor chips.
[122] By adhering the plurality of semiconductor chips using the above adhesive layer, the semiconductor chips can be easily laminated.
[123] The adhesive layer of the semiconductor device according to the present invention is preferably formed between the insulating layer and the semiconductor chip on the substrate side.
[124] By the above configuration, the adhesive layer can protect the bonding wire between the insulating layer and the semiconductor chip on the substrate side.
[125] In the semiconductor device according to the present invention, it is preferable that the adhesive layer is an epoxy resin.
[126] Since the epoxy resin is a thermosetting resin that is cured after melting from a solid to a liquid by heating, the bonding wire can be protected by curing after bonding the semiconductor chip.
[127] The thickness of the adhesive layer of the semiconductor device according to the present invention is preferably larger than the height of the bonding wire from the surface of the semiconductor chip to which the bonding wire is connected via the electrode terminal.
[128] As a result, contact between the bonding wire and the semiconductor chip adjacent to the semiconductor chip to which the bonding wire is connected can be prevented. Therefore, it is possible to reliably prevent the bonding wire from being damaged by the contact of the adjacent semiconductor chip.
[129] In the semiconductor device according to the present invention, it is preferable to form an insulating resin layer in a region other than the region where the electrode terminals of the semiconductor chip are arranged.
[130] Therefore, it is possible to prevent contact between the bonding wire and the semiconductor chip to which the bonding wire is connected through the electrode terminal. That is, since the surface in which the electrode terminal of the said semiconductor chip is formed is coat | covered except an electrode terminal by the insulating resin layer, it can prevent that the said bonding wire and the said semiconductor chip contact.
[131] In the semiconductor device of the present invention, the step of attaching a sheet made of an insulating layer and an adhesive layer so that the insulating resin layer is in contact with the wafer in the state of the wafer before dividing it into semiconductor chips, the wafer having the sheet attached to the semiconductor chip by dicing It can be produced by a method comprising the steps of dividing and adhering the semiconductor chip with the adhesive layer such that the adhesive layer is in contact with the semiconductor chip electrically connected to the substrate by the bonding wire.
[132] In addition, in the semiconductor device according to the present invention, a step of attaching a sheet-shaped insulating resin layer and a sheet-shaped adhesive resin layer in sequence to the back surface of the wafer, dividing the wafer into semiconductor chips by dicing, and bonding And adhering the divided semiconductor chip with the adhesive layer attached to the adhesive layer on the semiconductor chip electrically connected to the substrate by a wire.
[133] By the above method, the semiconductor device according to the present invention can be manufactured easily and reliably. That is, in the step of dividing the wafer into semiconductor chips, the insulating layer and the adhesive layer can be cut simultaneously with the semiconductor chips. That is, they can be cut at once. As a result, an insulating layer and an adhesive layer having the same size as the chip size of the semiconductor chip can be formed.
[134] Therefore, control of the adhesion area, the adhesion amount, and the thickness of an adhesive layer can be performed very easily, and the semiconductor device of this invention can be manufactured easily and reliably. In the present invention, the "chip size" refers to the vertical and horizontal outline sizes of the semiconductor chip facing the substrate or another semiconductor chip.
[135] Specific embodiments or examples of the detailed description of the invention are intended to clarify the technical details of the present invention, and should not be construed as limited to these specific embodiments or examples, and the spirit of the present invention and the following patents. Various changes can be made within the scope of the claims.
权利要求:
Claims (22)
[1" claim-type="Currently amended] Board,
A plurality of semiconductor chips stacked on a substrate,
A bonding wire for electrically connecting the electrode terminal formed on each semiconductor chip to the substrate, and
And an insulating layer formed between the bonding wires and the semiconductor chips stacked on the semiconductor chips which become the bonding wires.
[2" claim-type="Currently amended] The semiconductor device according to claim 1, wherein said insulating layer is a polyimide resin.
[3" claim-type="Currently amended] The semiconductor device according to claim 1, wherein the thickness of the insulating layer is in a range of 15 µm or more and 30 µm or less.
[4" claim-type="Currently amended] The semiconductor device according to claim 1, wherein the electrode terminal is disposed on a side of the semiconductor chip that faces the substrate.
[5" claim-type="Currently amended] The semiconductor device according to claim 1, wherein a region in which the electrode terminals of the semiconductor chip are disposed overlaps with a region in which the electrode terminals of the semiconductor chips stacked on the semiconductor chip are disposed.
[6" claim-type="Currently amended] The semiconductor device according to claim 1, wherein the external shapes of all the semiconductor chips stacked on the substrate are the same.
[7" claim-type="Currently amended] 2. The bonding wire according to claim 1, wherein a bonding wire connected to an electrode terminal of a semiconductor chip directly mounted on the substrate is provided between the substrate and a semiconductor chip stacked on the semiconductor chip directly mounted on the substrate. And the semiconductor chip stacked on the semiconductor chip directly mounted on the semiconductor chip is disposed in a region which does not overlap the semiconductor chip mounted directly on the substrate.
[8" claim-type="Currently amended] The semiconductor device according to claim 1, wherein bumps are formed on the electrode terminals, and the bonding wires are connected by using a reverse wire bonding method.
[9" claim-type="Currently amended] The terminal of claim 1, wherein the plurality of semiconductor chips and the bonding wires stacked on the substrate are sealed by a sealing resin, and an external connection terminal is provided on a side opposite to the surface on which the plurality of semiconductor chips of the substrate are stacked. The semiconductor device characterized by the above-mentioned.
[10" claim-type="Currently amended] The semiconductor device according to claim 1, wherein an adhesive layer is formed between each of said plurality of semiconductor chips.
[11" claim-type="Currently amended] The semiconductor device according to claim 10, wherein the adhesive layer is formed between the insulating layer and the semiconductor chip on the substrate side.
[12" claim-type="Currently amended] The semiconductor device according to claim 10, wherein the adhesive layer is a thermosetting resin.
[13" claim-type="Currently amended] The semiconductor device according to claim 10, wherein the adhesive layer is an epoxy resin.
[14" claim-type="Currently amended] The semiconductor device according to claim 10, wherein a thickness of the adhesive layer is larger than a height of the bonding wire from a surface of the semiconductor chip to which the bonding wire is connected through the electrode terminal.
[15" claim-type="Currently amended] The semiconductor device according to claim 1, wherein an insulating resin layer is formed in a region other than a region in which the electrode terminals are disposed on the semiconductor chip.
[16" claim-type="Currently amended] The semiconductor device according to claim 15, wherein the insulating resin layer is a polyimide resin.
[17" claim-type="Currently amended] Board,
A plurality of semiconductor chips stacked on the substrate,
Bonding wires electrically connecting the electrode terminals disposed on the respective semiconductor chips to the substrate, and
A semiconductor device comprising a bonding wire and an insulating layer disposed between semiconductor chips stacked on a semiconductor chip to which the bonding wire is connected,
Attaching a sheet made of an insulating layer and an adhesive layer to the wafer before dividing into semiconductor chips such that the insulating layer side of the sheet is in contact with the wafer;
Dividing the sheet-attached wafer into semiconductor chips by dicing (b); And
And (c) adhering the semiconductor chip with the adhesive layer to the semiconductor chip electrically connected to the substrate by the bonding wire by the adhesive layer.
[18" claim-type="Currently amended] 18. The method of claim 17, further comprising polishing the back surface of the wafer before the attaching step (a).
[19" claim-type="Currently amended] 18. The method of claim 17, wherein the attaching (a) attaches a sheet having a uniform thickness to each of the insulating layer and the adhesive layer to the wafer.
[20" claim-type="Currently amended] 18. The manufacturing method of a semiconductor device according to claim 17, wherein said bonding step (c) is bonded by said adhesive layer so as to cover electrode terminals disposed on a semiconductor chip electrically connected to a substrate.
[21" claim-type="Currently amended] 18. The method of manufacturing a semiconductor device according to claim 17, wherein the step (c) of bonding is performed by heating a semiconductor chip and a bonding wire electrically connected to a substrate to a temperature at which the adhesive layer softens and melts.
[22" claim-type="Currently amended] Board,
A plurality of semiconductor chips stacked on the substrate,
Bonding wires electrically connecting the electrode terminals disposed on the respective semiconductor chips to the substrate, and
A semiconductor device comprising a bonding wire and an insulating layer disposed between semiconductor chips stacked on a semiconductor chip to which the bonding wire is connected,
(A) attaching an insulating layer sheet made of an insulating layer to the wafer before dividing the wafer into semiconductor chips;
After the attaching step (a), attaching an adhesive layer sheet made of an adhesive layer to a surface on which the insulating layer sheet is attached;
Dividing the wafer with the insulating layer sheet and the adhesive layer sheet into a semiconductor chip by dicing; And
And (d) adhering the semiconductor chip with the adhesive layer to the semiconductor chip electrically connected to the substrate by the bonding wire by the adhesive layer.
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同族专利:
公开号 | 公开日
JP3913481B2|2007-05-09|
KR100461220B1|2004-12-10|
TW544902B|2003-08-01|
US6657290B2|2003-12-02|
US20020096755A1|2002-07-25|
JP2002222913A|2002-08-09|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
2001-01-24|Priority to JPJP-P-2001-00016420
2001-01-24|Priority to JP2001016420A
2002-01-24|Application filed by 샤프 가부시키가이샤
2002-07-31|Publication of KR20020062857A
2004-12-10|Application granted
2004-12-10|Publication of KR100461220B1
优先权:
申请号 | 申请日 | 专利标题
JPJP-P-2001-00016420|2001-01-24|
JP2001016420A|JP3913481B2|2001-01-24|2001-01-24|Semiconductor device and manufacturing method of semiconductor device|
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