• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    PURPOSE: In the present invention, a capping layer is formed on an amorphous silicon, the capping layer is vertically etched by a photolithography process, the active layer is etched obliquely, and a nucleus is generated on both sides of the inclined etched active layer by irradiating a laser beam on the capping layer. The active layer covered with the capping layer provides a method of manufacturing a thin film transistor which generates only crystal growth. Composition: The present invention comprises sequentially forming a buffer layer and an amorphous silicon layer on a substrate, depositing a capping layer on the amorphous silicon, forming a photoresist pattern on the capping layer, the capping layer is vertically etched by using the photoresist pattern as a mask And etching the amorphous silicon obliquely to form an active layer, removing the photoresist pattern and recrystallizing the active layer formed of amorphous silicon into polycrystalline silicon, removing the capping layer, and forming a gate insulating film and a gate electrode on the buffer layer and the active layer. And forming a channel region, a drain region, and a source region in the active layer by implanting a high concentration of impurities after forming the gate electrode. Effect: Nucleus is formed on both sides of the inclined etched active layer, and the active layer covered with the capping layer generates only crystal growth, so that coarse and uniform grain is grown toward the center of the channel region of the active layer by the generated nucleus to improve charge mobility. The surface of the active layer can be made uniform, and the adhesion to the gate insulating film can be improved.
    公开号:KR19990086871A
    申请号:KR1019980020046
    申请日:1998-05-30
    公开日:1999-12-15
    发明作者:김혜동
    申请人:손욱；삼성전관 주식회사；
    IPC主号:
    专利说明:

    Method of manufacturing thin film transistor
    The present invention relates to a method of manufacturing a thin film transistor, and more particularly, to a method of manufacturing a thin film transistor using polycrystalline silicon recrystallized by forming amorphous silicon and laser annealing the amorphous silicon.
    FIG. 2 is a cross-sectional structure of a conventional thin film transistor, in which a conventional thin film transistor includes a substrate 1 and a buffer layer 2 and a buffer layer formed by depositing an oxide film on the substrate 1 using thin film equipment. 2) An active layer 3 having a heavily doped drain region 3a, a source region 3b, and an undoped channel region I formed thereon, and a gate formed by completely depositing a silicon oxide film on the active layer 3. And a gate electrode 5 formed by depositing a polycrystalline silicon or metal film on the entire surface of the insulating film 4 and the gate insulating film 4 by a photolithography process.
    The active layer 3 in which the channel region and the drain and the source region are formed may be formed of amorphous silicon or polycrystalline silicon.
    Since polycrystalline silicon has a greater mobility of carriers than amorphous silicon, thin film transistors (TFTs) using polycrystalline silicon have excellent switching characteristics and thus are smaller than thin film transistors using amorphous silicon. It can form with area. This can improve the aperture ratio of the liquid crystal display by forming a thin film transistor that controls on / off of pixels in the active matrix liquid crystal display.
    In order to form an active layer into polycrystalline silicon, there is a method of directly depositing an active layer into polycrystalline silicon and a method of forming an active layer into amorphous silicon and then depositing into polycrystalline silicon formed by recrystallizing amorphous silicon, but laser annealing of laser silicon is performed. In the method of recrystallization into polycrystalline silicon, the surface of amorphous silicon is heated and melted by a laser beam at a high temperature of about 1000 ° C. or more, but since the substrate 1 is not damaged, a low-temperature glass having low cost may be used.
    A method of manufacturing a conventional thin film transistor using polycrystalline silicon by forming amorphous silicon and laser annealing the amorphous silicon is as follows.
    An oxide film is deposited on the upper portion of the glass substrate 1 to form a buffer layer 2, the active layer 3 made of amorphous silicon is deposited on the entire upper surface of the buffer layer 2, and the active layer 3 is patterned. The patterned active layer 3 is then laser annealed to recrystallize the active layer 3 into polycrystalline silicon. The gate insulating film 4 is formed on the patterned active layer 3 and the buffer layer 2, and the gate electrode 5 formed of polycrystalline silicon or metal is formed at a predetermined position on the gate insulating film 4. After the gate electrode 5 is formed, a high concentration of impurities are implanted using the gate electrode 5 as a mask to undo the active layer 3 under the gate electrode 5 to form a channel region I. On the left and right sides of the channel region I, the drain region 3a and the source region 3b are formed by the high concentration of impurities implanted with ions.
    When the gate electrode 5 is formed of polycrystalline silicon, the drain region 3a and the source region 3b are automatically formed by the gate electrode 5 when ion implantation of impurities at high concentration is performed by using the gate electrode 5 as a mask. When the self-aligned position is formed and the gate electrode 5 is formed of metal, the active layer 3 is ion-implanted with a high concentration of impurities using a photosensitive film pattern for patterning the gate electrode 5 by a photolithography process. ), The drain region 3a and the source region 3b are formed.
    The conventional thin film transistor manufacturing method using the polycrystalline silicon by laser annealing the amorphous silicon is a laser annealing by irradiating a laser beam directly to the active layer formed of amorphous silicon to recrystallize the amorphous silicon into polycrystalline silicon, but crystal grains grow in the recrystallization process As the surface of the active layer becomes rougher, the surface of the active layer is not uniform, and the size of crystals is different for each part, so that the adhesion to the gate insulating film on the upper part of the active layer is poor and the mobility of charge is not uniform. .
    An object of the present invention is to form a capping layer on the amorphous silicon, and to etch the capping layer vertically by a photolithography process, the active layer is inclined etched and irradiated with a laser beam on the capping layer to increase the fast cooling speed at both sides of the inclined etched active layer The nucleus is first generated and the active layer covered with the capping layer generates only crystal growth due to the slow cooling rate, so that the generated nucleus is grown into coarse and uniform grain toward the center of the channel region of the active layer, thereby improving charge mobility. In addition, the surface of the active layer is uniform to provide a thin film transistor manufacturing method that can improve the adhesion with the gate insulating film.
    In order to achieve the above object, a method of manufacturing a thin film transistor according to the present invention includes sequentially forming a buffer layer and an amorphous silicon layer on a substrate, depositing a capping layer on the amorphous silicon, and forming a photoresist pattern on the capping layer. Using a pattern as a mask, the capping layer is vertically etched and the amorphous silicon is etched obliquely to form an active layer, the photoresist pattern is removed, and the active layer formed of amorphous silicon is recrystallized with polycrystalline silicon, the capping layer is removed, and the buffer layer and the active layer are removed. Forming a gate insulating film on the upper portion of the gate insulating film, forming a gate electrode at a predetermined position on the gate insulating film, and implanting a high concentration of impurities after forming the gate electrode to form an undoped channel region in the active layer below the gate electrode, High concentration of ion-implanted fire Characterized in that it includes the step of forming the drain region and the source region by the water.
    The capping layer is made of any one of silicon oxide film and zinc oxide, which is a material having low thermal conductivity.
    1A to 1F illustrate a method of manufacturing a thin film transistor according to the present invention.
    Process Flowchart,
    2 is a cross-sectional structure diagram of a conventional thin film transistor.
    Hereinafter, a method of manufacturing a thin film transistor of the present invention will be described in detail with reference to the accompanying drawings.
    1A to 1G are cross-sectional views illustrating a method of manufacturing a thin film transistor according to the present invention.
    In the method of manufacturing the thin film transistor of FIG. 1, the buffer layer 12 and the amorphous silicon layer 13 are sequentially formed on the substrate 11, and the capping layer 14 is deposited on the amorphous silicon 13. Step, the photoresist pattern PR is formed on the capping layer 14, and the capping layer 14 is vertically etched and the amorphous silicon 13 is etched obliquely using the photoresist pattern PR as a mask to form the active layer 13a. Irradiating a laser beam over the active layer 13a and the patterned capping layer 14a to remove the photoresist pattern PR and recrystallize the active layer 13a formed of amorphous silicon into polycrystalline silicon. Removing the capping layer 14a, forming the gate insulating layer 15 on the buffer layer 12 and the active layer 13a, and forming the gate electrode 16 at a predetermined position on the gate insulating layer 15 and the gate electrode ( 16) After formation, high concentration of impurities Implantation to form a undoped channel region (I) in the active layer (13a) below the gate electrode (16) and drain and source regions (13b) by the high concentration of impurities implanted into the left and right sides of the channel region (I) Forming step.
    The capping layer 14 and the amorphous silicon 13 are etched by dry etching, and the capping layer 14 is made of any one of silicon oxide film (SiO 2 ) and zinc oxide (ZnO), which are materials having low thermal conductivity.
    A method of manufacturing the thin film transistor of the present invention will be described with reference to FIGS. 1A to 1F.
    As shown in FIG. 1A, a silicon oxide film (SiO 2 ) or the like having a low thermal conductivity is deposited on the substrate 11 to form a buffer layer 12, and a plasma is formed on the buffer layer 12. Plasma Enhanced Chemical Vapor Deposition (PECVD) forms an amorphous silicon layer 13 having a thickness of about 500 kV to 1000 kPa. As shown in FIG. 1B, the capping layer 14 is deposited on the amorphous silicon 13 using a silicon oxide film (SiO 2 ), zinc oxide (ZnO), or the like having a low thermal conductivity. A photoresist pattern PR is formed on the capping layer 14 to pattern the active region using a photolithography process as shown in FIG. 1C. As shown in FIG. 1D, the capping layer 14 is vertically etched using the photoresist pattern PR as an etch mask to form a patterned capping layer 14a, and the amorphous silicon 13 is etched obliquely to form an active layer 13a. ). In other words, both ends of the active layer 13a are inclined, and both of the inclined ends are not covered with the patterned capping layer 14a. As shown in FIG. 1E, a laser beam is irradiated on the active layer 13a and the patterned capping layer 14a to remove the photoresist pattern PR and recrystallize the active layer 13a formed of amorphous silicon into polycrystalline silicon. Laser annealing is performed. Since the inclined ends of the active layer 13a are exposed outside the capping layer 14a during laser annealing, the cooling rate is high, and the active layer 13a covered with the capping layer 14a has a low thermal conductivity capping layer 14a. Cooling rate is slow. Since the inclined ends of the active layer 13a having a high cooling rate are rapidly formed in the nucleus 13b, the active layer 13a covered with the capping layer 14a having a slow cooling rate only undergoes crystal growth, so the active layer 13a Grain grows in the center portion of the active layer 13a by the nuclei 13b generated at both ends of the inclined ends of the crest. Thus, two coarse grains 13c are formed in the active layer 13a. Mobility can be improved. In addition, when the active layer 13a covered by the capping layer 14a is crystallized from amorphous silicon to polycrystalline silicon, the surface state of the polycrystalline silicon becomes very uniform, so that the gate insulating film 15 generated in the active layer 13a and the subsequent process is performed. ) Good adhesion with).
    As shown in FIG. 1F, the patterned capping layer 14a is removed, and the gate insulating layer 15 is formed on the buffer layer 12 and the active layer 13a, and the gate electrode is disposed at a predetermined position on the gate insulating layer 15. 16). The gate electrode 16 may be formed of polycrystalline silicon or metal. After the gate electrode 16 is formed, a high concentration of impurities are ion implanted to form an undoped channel region I in the active layer 13a below the gate electrode 16, and a high concentration of ion implantation in left and right sides of the channel region I. The drain region and the source region 13d are formed by impurities.
    In the present invention, nuclei are generated on both sides of the inclined etched active layer, and the active layer covered with the capping layer generates only crystal growth, whereby coarse and uniform grains are grown toward the center of the channel region of the active layer by the generated nucleus to increase the mobility of charge. The surface of the active layer can be made uniform, and the adhesion to the gate insulating film can be improved.
    权利要求:
    Claims (2)
    [1" claim-type="Currently amended] Sequentially forming a buffer layer and an amorphous silicon layer on the substrate;
    Depositing a capping layer over the amorphous silicon;
    Forming a photoresist pattern on the capping layer and etching the capping layer vertically using the photoresist pattern as a mask, and etching the amorphous silicon obliquely to form an active layer;
    Removing the photoresist pattern and recrystallizing the active layer formed of amorphous silicon with polycrystalline silicon;
    Removing the capping layer, forming a gate insulating layer on the buffer layer and the active layer, and forming a gate electrode at a predetermined position on the gate insulating layer; And
    After the gate electrode is formed, a high concentration of impurities are ion implanted to form a undoped channel region in the active layer below the gate electrode, and the drain region is formed by the high concentration of impurities implanted in the left and right sides of the channel region. A method of manufacturing a thin film transistor, comprising: forming a source region.
    [2" claim-type="Currently amended] The method of claim 1, wherein the capping layer is made of any one of a silicon oxide film and zinc oxide.
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    同族专利:
    公开号 | 公开日
    KR100271493B1|2000-11-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1998-05-30|Application filed by 손욱, 삼성전관 주식회사
    1998-05-30|Priority to KR1019980020046A
    1999-12-15|Publication of KR19990086871A
    2000-11-15|Application granted
    2000-11-15|Publication of KR100271493B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019980020046A|KR100271493B1|1998-05-30|1998-05-30|Method of manufacturing thin film transistor|
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