• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    end. TECHNICAL FIELD The present invention relates to an electronic exchange, and more particularly, to a dedicated tracking device and method for tracking specific data through reception and analysis of communication data between all processors in the electronic exchange. It is about. I. The technical problem to be solved by the present invention: In the large-capacity local exchange system, stabilization of the IPC network is absolutely necessary, and when a problem occurs, the need for a method for prompt problem analysis and a corresponding solution has emerged. All. SUMMARY OF THE INVENTION The present invention provides an apparatus for tracking communication data between processors in an electronic exchange; A microprocessor which is in charge of the overall operation of the system, an epirom which stores the operation control program of the microprocessor, and a data receiving unit which receives all communication data from the data bus connecting the processors and stores them in an internal temporary storage area. And a serial data interface for reading received communication data temporarily stored in the data receiving unit and storing the received communication data in a storage area designated therein, and generating a storage completion signal, and receiving a communication data storage completion signal from the serial data interface. A DM controller which generates an interrupt to the microprocessor and causes the microprocessor to read the communication data stored in the designated storage area, and displays desired tracking communication data on the STI screen under the control of the microprocessor. Characterized by a lock consisting of a control unit for controlling display. la. Important use of the invention: It is applied to the communication data tracking device between processors in the electronic exchange.
    公开号:KR19990034832A
    申请号:KR1019970056531
    申请日:1997-10-30
    公开日:1999-05-15
    发明作者:장영식
    申请人:윤종용；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Communication data tracking device and method between processors in an electronic exchange
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic exchange, and more particularly, to a dedicated tracking device and method for tracking specific data through reception and analysis of communication data between all processors in the electronic exchange.
    In general, the concept of interprocessor communication (IPC) in a large-capacity local exchange system is an IPC message exchange between a plurality of distributed processors, and an IPC network composed of several hierarchical structures for realizing it. IPC communication is enabled through network.
    In the above distributed control system, the communication path (IPC path) that enables communication between all the processors is a very important part in terms of system reliability, and it can be said that the impact on the system when a problem occurs. In other words, when a problem occurs in the communication between a plurality of processors distributed in a large-scale local exchange system, it is caused by a problem of the processor itself or by a problem in the IPC communication path composed of several hierarchical structures. There is a problem that it takes a lot of time and work to determine whether or not it occurred. In addition, in the case of an exchange system in service, there were problems that various restrictions exist in performing necessary work for problem tracking and resolution.
    In addition, as a problem, when a problem occurs in communication between a plurality of distributed processors, the status of many processors in the switching system must be checked in order to find the problem point, and the communication path of a complicated hierarchical IPC network is required. There is a cumbersome problem that must be checked one by one.
    Therefore, stabilization of the IPC network is absolutely necessary in the large-capacity local exchange system, and a need arises for a method for prompt problem analysis and corresponding solutions in case of problems.
    Accordingly, an object of the present invention is to provide a dedicated device and a method of operating the same, which can directly track communication data between processors for all IPC networks in an exchange system.
    The present invention for achieving the above object is an apparatus for tracking communication data between processors in an electronic exchange; A microprocessor which is in charge of the overall operation of the system, an epirom which stores the operation control program of the microprocessor, and a data receiving unit which receives all communication data from the data bus connecting the processors and stores them in an internal temporary storage area. And a serial data interface for reading received communication data temporarily stored in the data receiving unit and storing the received communication data in a storage area designated therein, and generating a storage completion signal, and receiving a communication data storage completion signal from the serial data interface. A DM controller which generates an interrupt to the microprocessor and causes the microprocessor to read the communication data stored in the designated storage area, and displays desired tracking communication data on the STI screen under the control of the microprocessor. Characterized by a lock consisting of a control unit for controlling display.
    The present invention for achieving the above object is a communication data tracking method between processors in an electronic exchange; When the system enters the PC tracking command from the operator in the initialization state, the system moves to the on-line program area to perform the function and performs the online function, and displays various test types in the menu form on the CRT screen. And storing the communication data received in an internal designated storage area by driving internal hardware elements for receiving communication data on a data bus when the operator selects communication data tracking between two specific processors among the displayed test types. A second step of analyzing the stored received communication data and determining whether there is a signal area to be tracked among the signal areas included in the data; and when the received communication data includes the signal area to be tracked, The communication that the signal area is included in the CRT screen Characterized in that the fourth step of outputting the data.
    1 is a block diagram of an apparatus for tracking communication data between processors in an electronic exchange according to an embodiment of the present invention.
    2A and 2B are flowcharts illustrating an operation control of an apparatus for tracking communication data between processors in an electronic exchange according to an embodiment of the present invention.
    Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.
    1 is a block diagram of an apparatus for tracking communication data between processors in an electronic exchange according to an embodiment of the present invention. Referring to FIG. 1, the microprocessor 100 uses a 32-bit MC68020 type and controls the overall operation of the system. EPROM (Erasable Programmable Read Only Memory) 110 has a storage capacity of 128 Kbytes and stores the system operation control program of the present tracking device. The first SRAM 108 (hereinafter referred to as SRAM) 108 has a storage capacity of 128 Kbytes, and stores received data stored in the PPI memory in the serial data interface 106 under the control of the DMA controller 104 to be described later. . The Multi Function Pheripheral (hereinafter referred to as MFP) 102 uses the MC68901 type and displays desired tracking communication data on a CRT (Cathod Ray Tube) screen under the control of the microprocessor. A DMA controller (hereinafter, referred to as a DMA controller) 104 uses an MC68450 type and accesses the first SRAM 108 based on a request signal from a serial data interface unit 106 to access the serial data interface. The received data stored in the PIPO memory in the unit 106 is stored. The serial data interface 106 (hereinafter, referred to as a serial data interface) 106 uses the SCN68562 type, and has a built-in memory to temporarily store received data and under the control of the DMA controller 104. The stored received data is stored in the SRAM 108. Application Specific Integrated Circuit (ASIC: Application Specific Integrated Circuit hereinafter) The ED8901 type is used. It is responsible for receiving high-speed communication data between processors. The second random random access memory (SRAM) 114 has a storage capacity of 32 Kbytes and temporarily stores received data. The receiver 116 receives data Rx-data and clock Rx-clock from the data bus. The control circuit unit 118 uses the EPM5128 type, and is in charge of the control for receiving the data bus.
    Referring to the operation of the communication data tracking device having the above configuration, first, the tracking device is in the form of a slot board, and the data line 120 which is a communication path between the processors for receiving communication data between the processors in the switching system. Connect to Therefore, all data (Rx-data) and clock (Rx-clock) flowing through the data bus 120 are received in the path of U through the receiver 116. Then, all the received data Rx-data is applied to the application specific integrated circuit 112 in a path of ㉡ → ㉡. At this time, the control circuit unit 118 generates a control signal in the application-specific integrated circuit 112 as a path such as ㉣ and temporarily stores the applied received data Rx-data in the second SRAM 114 as a path of ㉤. do. Thereafter, the application specific integrated circuit 112 applies the temporarily stored received data to the serial interface unit 106 at the rear end in a path of ㉥. At this time, the serial data interface unit 106 stores the received data input from the application-specific integrated circuit in an internal PIPO memory, and sends a memory direct access request signal to the DMA controller 104 as a path of ㉦. Occurs. At this time, the DMA controller 104 receives the request signal and stores the received data stored in the encapsulated memory inside the serial data interface unit 106 in the first SRAM 108 as a path of ㉧. Then, when the DMA controller 104 completes storing the received data in the first SRAM 108, the microprocessor 100 generates an interrupt in the path of V to analyze the stored received data in the path of V. do. When the operator needs to confirm the received data, the microprocessor 100 outputs the screen to the screen using the MFP 102 in the path of ㉪.
    Next, an operation control flowchart of the communication data tracking circuit for performing the hardware configuration and operation as described above will be described in detail with reference to FIG.
    2 is an operation control flowchart of an apparatus for tracking communication data between processors in an electronic exchange according to an exemplary embodiment of the present invention. First, this flowchart shows the control procedure of the microprocessor and is stored in the EPROM 110. Referring to FIG. 2, first, when the microprocessor 100 starts (up-up), a debug program of its own is driven to initialize a hardware device and a memory. Then, when the command “ipctr (ipc trace)” is input from the user in the initialization state by performing steps 202 to 204, the microprocessor 100 performs an “on-line program” to perform the function of the apparatus. program) "to perform the online function and display various function screens in the menu form on the CRT screen. At this time, there are three types of menus: tracing communication data between two specific processors, tracing only a specific signal among data between processors, and checking an IPC network in an exchange system. Perform the control flow.
    Therefore, when the operator selects tracing of communication data between two specific processors, the microprocessor 100 performs steps 206 to 208 to describe internal hardware elements for receiving communication data on the data bus 120. Drive as in 1 to store the communication data received in the first SRAM (108). Then, in step 210, the microprocessor 100 analyzes the received data stored in the first SRAM 108, and in step 212, two processors to which the destination address area and the original address area included in the data are to be traced. Is compared to their address. In this case, when the comparison value is the same, the microprocessor 100 may track the communication data between two specific processors by outputting the received data on the CRT screen using the MFP 102 in steps 214 to 216.
    Meanwhile, when the operator selects to track only a specific signal among data between the processors, the microprocessor 100 performs steps 218 to 220 to describe internal hardware elements for receiving communication data on the data bus 120. As shown in FIG. 1, the communication data received in the first SRAM 108 is stored. Thereafter, in step 222, the microprocessor 100 analyzes the received data stored in the first SRAM 108 and determines whether there is a signal area to be traced among the signal areas included in the data in step 224. In this case, when the received communication data includes a signal area to be traced, the microprocessor 100 outputs the received data to the CRT screen using the MFP 102 in steps 214 to 216.
    In addition, when the operator selects a check on the IPC network in the 3) exchange system, the microprocessor 100 requests the user for necessary data accordingly. In this case, the reason for requesting the necessary data is that the IPC network in the exchange system may vary depending on its capacity.
    Accordingly, the microprocessor 100 performs internal data processing from the user and performs operations 226 to 228, and then illustrates the internal hardware elements for receiving communication data on the data bus 120 in FIG. Drive as At this time, the microprocessor 100 receives and stores all communication data on the data bus 120 in the first SRAM 108 to check the IPC state. Then, in steps 230 to 234, the microprocessor 100 is based on the original source area of the received data stored for the predetermined time, and corresponds to the data inputted from the user to the databased data, respectively, in each path of the IPC network. Create status information for Then, in step 236, the microprocessor 100 detects the IPC path that is found to have an abnormality by analyzing state information generated for the entire path of the IPC network, and detects the IPC path where the abnormality has occurred in steps 214 to 216. The MFP 102 is used to display on the CRT screen. Then, when the microprocessor 100 requests the output of a check point for the abnormal IPC path, the microprocessor 100 repeats the above steps 226 to 236 to analyze the state of the entire IPC network. do. In operation 240, the microprocessor 100 subdivides the check point for the IPC path in which an abnormality occurs in the analyzed state of the entire IPC network. At this time, the reason for subdividing the check point for the IPC path is that the large-capacity exchanger is a distributed control method, and has a hierarchical structure.
    Therefore, in steps 242 to 244, the microprocessor 100 checks whether there is data transmitted from the closest subprocessor several times and checks for abnormality. In this case, when the abnormality is checked, the microprocessor 100 uses the MFP 102 in step 214 to 216 to designate a PBA including the corresponding processor as a check point on the CRT screen and output the check point. However, when it is determined that there is no abnormality in step 244, all subprocessors up to the last processor are checked in order of checking the next adjacent subprocessor in the same manner as described above.
    Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by those equivalent to the scope of the claims.
    As described above, the present invention enables the reception, tracking, and analysis of communication data between processors for all IPC networks in an exchange system, so that it is possible to quickly identify a problem occurrence point and to perform corrective measures accordingly.
    权利要求:
    Claims (5)
    [1" claim-type="Currently amended] In the communication data tracking device between processors in an electronic exchange,
    A microprocessor responsible for the overall operation of the system,
    An epirom storing an operation control program of the microprocessor;
    A data receiver which receives all communication data from a data bus connecting the processors and stores the communication data in an internal temporary storage area;
    A serial data interface for reading received communication data temporarily stored in the data receiving unit, storing the received communication data in a designated storage area, and generating a storage completion signal;
    A DM controller which generates an interrupt to the microprocessor upon receiving a communication data storage completion signal from the serial data interface, and causes the microprocessor to read communication data stored in a designated storage area;
    And a display control unit for controlling to display the desired tracking communication data on the STI screen under the control of the microprocessor.
    [2" claim-type="Currently amended] The method of claim 1, wherein the data receiving unit,
    A receiver which receives all communication data from a data bus connecting the processors;
    An application-specific integrated circuit responsible for receiving communication data between high-speed processors received through the receiving unit;
    A temporary memory for temporarily storing communication data between high-speed processors received through the application-specific integrated circuit;
    And a control circuit for generating a control signal so that communication data between the high speed processors received through the application-specific integrated circuit is stored in the temporary memory.
    [3" claim-type="Currently amended] In the communication data tracking method between processors in an electronic exchange,
    When the system enters the PC tracking command from the operator in the initialization state, the system moves to the on-line program area to perform the function and performs the online function, and displays various test types in the menu form on the CRT screen. Steps,
    A second step of storing all communication data received in an internal designated storage area by driving internal hardware elements for receiving communication data on a data bus when the operator selects communication data tracking between two specific processors among the test types displayed; ,
    Analyzing the stored received communication data to determine whether there is a signal area to be traced among the signal areas included in the data;
    And a fourth step of outputting the communication data including the signal area on the CRT screen when the signal area to be tracked is included in the received communication data.
    [4" claim-type="Currently amended] In the communication data tracking method between processors in an electronic exchange,
    When the system enters the PC tracking command from the operator in the initialization state, the system moves to the on-line program area to perform the function and performs the online function, and displays various test types in the menu form on the CRT screen. Steps,
    A second step of requesting the operator for necessary data according to the operator selecting the check for the IP network among the test types displayed, and databaseting the data inputted from the operator;
    A third step of driving internal hardware elements for checking the IP network status and receiving and storing all communication data on a data bus in an internal designated storage area;
    A fourth step of creating status information for each path of the PCC based on the original source area of the received data stored for the predetermined time and corresponding to the data inputted from the user and the database;
    Analyzing the state information of the entire APC network path to detect an APC path found to have an abnormality, and performing a fifth step of displaying the APC path having an abnormality displayed on a CRT screen; Way.
    [5" claim-type="Currently amended] The method of claim 4, wherein
    A sixth step of subdividing the check point for the abnormal PC path when the abnormal PC path is displayed after displaying the APC path on which the abnormal path is generated and requesting the output of the check point for the APC path;
    A seventh step of checking whether there is data transmitted from each processor sequentially from the closest subprocessor to the last subprocessor among the subdivided checkpoints, and repeatedly checking for abnormality;
    And if the abnormality is checked, performing an eighth step of designating a board including the corresponding processor as a checkpoint on the screen and outputting the checkpoint.
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    同族专利:
    公开号 | 公开日
    KR100251695B1|2000-04-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-10-30|Application filed by 윤종용, 삼성전자 주식회사
    1997-10-30|Priority to KR1019970056531A
    1999-05-15|Publication of KR19990034832A
    2000-04-15|Application granted
    2000-04-15|Publication of KR100251695B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970056531A|KR100251695B1|1997-10-30|1997-10-30|Method and apparatus of tracing a communication data between the processors in an exchanger|
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