• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Disclosed is a method of manufacturing a thin film type optical path control device capable of preventing an electrical short between an upper electrode and a lower electrode. An actuator including a support layer, a lower electrode, a deformation layer, and an upper electrode is formed on the active matrix on which the first and second metal layers are formed. A first via contact is formed to connect one side of the lower electrode to the first metal layer. After forming an insulating layer separating the other side of the upper electrode and the lower electrode, a second via contact connecting the upper electrode and the second metal layer is formed. The insulating layer is formed using silica, amorphous silicon, or polysilicon. By using the insulating layer to separate the upper electrode and the lower electrode from the second via hole portion, the cracks are generated in the deformation layer of the second via contact portion, so that the upper electrode and the lower electrode are connected to each other between the upper electrode and the lower electrode. An electrical short can be prevented from occurring. In addition, by interposing the insulating layer, the upper electrode may be more easily connected to the second metal layer through the second via contact, thereby generating a stable electric field between the upper electrode and the lower electrode.
    公开号:KR19990034627A
    申请号:KR1019970056262
    申请日:1997-10-30
    公开日:1999-05-15
    发明作者:엄민식
    申请人:전주범；대우전자 주식회사；
    IPC主号:
    专利说明:

    Manufacturing method of thin film type optical path control device
    The present invention relates to a method of manufacturing a thin film type optical path control apparatus using an Actuated Mirror Array (AMA), and more particularly, an upper electrode and a lower part of a portion where an upper electrode is connected to a second metal layer and an upper electrode is connected to a second metal layer. The present invention relates to a method for manufacturing a thin film type optical path control apparatus capable of preventing an electrical short between an upper electrode and a lower electrode by forming an isolation layer between the electrodes.
    Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. An image processing apparatus using such an optical modulator is generally divided into a direct-view image display device and a projection-type image display device according to a method of displaying optical energy on a screen. do.
    An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image display devices include a liquid crystal display (LCD), a deformable mirror device (DMD), and an AMA. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.
    Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited to a range of 1-2%, requiring dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.
    Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.
    Each actuator mounted in the AMA causes deformation in accordance with the electric field generated by the electric image signal and the bias signal applied. As the actuator deforms, each of the mirrors mounted thereon is tilted. Accordingly, the inclined mirrors reflect light incident from the light source at a predetermined angle to form an image on the screen. Piezoelectric materials such as PZT (Pb (Zr, Ti) O 3 ) or PLZT ((Pb, La) (Zr, Ti) O 3 ) are used as actuators for driving the respective mirrors. The actuator may also be configured as a warping material such as PMN (Pb (Mg, Nb) O 3 ).
    These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by a sawing method and installing a mirror thereon. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the strained layer is slow.
    Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in Korean Patent Application No. 97-16715 (the name of the invention: thin film type optical path control device and its manufacturing method) filed by the present applicant with the Korean Patent Office on April 30, 1997.
    FIG. 1 is a plan view of a thin film type optical path adjusting device described in the preceding application, FIG. 2 is an enlarged plan view of a portion 'A' of the device shown in FIG. 1, and FIG. 3A is BB of the device shown in FIG. 3 is a cross-sectional view taken along the line CC 'of the device shown in FIG. 1, and FIG. 3C is a cross-sectional view taken along the line DD' of the device shown in FIG.
    1 to 3C, the thin film type optical path control apparatus includes an active matrix 10 and an actuator 90 formed on the active matrix 10.
    The active matrix 10 having M × N (M, N is an integer) embedded therein includes a first metal layer 15 formed on an upper portion thereof and a first metal layer formed on an upper portion of the first metal layer 15. The protective layer 20, the second metal layer 25 formed on the first protective layer 20, the second protective layer 30 formed on the second metal layer 25, and the second protective layer 30. It includes an etch stop layer 35 formed on the top. The first metal layer 15 includes a drain pad extending from the drain region of the MOS transistor to transmit a first signal (image signal). The second metal layer 25 is made of a titanium layer and a titanium nitride layer.
    The actuator 90 has one side in contact with a portion of the etch stop layer 35 in which the drain pad of the first metal layer 15 is formed, and the other side is parallel to the etch stop layer 35 through the air gap 95. The support layer 45, the lower electrode 50 formed on the support layer 45, the strained layer 55 formed on the lower electrode 50, and the upper electrode 60 formed on the strained layer 55. ). A stripe 65 is formed on a portion of the upper electrode 60. The stripe 65 uniformly operates the upper electrode 60 so that the light incident from the light source is deformed at the boundary between the portion of the upper electrode 60 which is deformed and the portion which is not deformed according to the deformation of the deforming layer 55. Prevents diffuse reflection.
    Referring to FIG. 3C, one side of a portion of the support layer 45 that contacts the etch stop layer 35 may be formed from the strained layer 55, the support layer 45, the etch stop layer 35, and the second electrode from the upper electrode 60. The first via hole 70 is vertically formed through the passivation layer 30 to the second metal layer 25. The first via contact 75 connecting the upper electrode 60 and the second metal layer 25 to each other is formed in the first via hole 70. Accordingly, the upper electrode 60 is connected to the upper electrode of the neighboring actuator through the second metal layer 25.
    In addition, a support layer 45, an etch stop layer 35, a second passivation layer 30, and a second layer may be formed on the other side of the support layer 45 below the portion in contact with the etch stop layer 35 from the lower electrode 50. The second via hole 80 is vertically formed through the first protective layer 20 to the drain pad of the first metal layer 15. A second via contact 85 is formed in the second via hole 80 to connect the lower electrode 50 and the drain pad of the first metal layer 15 to each other. Accordingly, a first signal (image signal) is applied to the lower electrode 50 through the MOS transistor embedded in the active matrix 10, the drain pad of the first metal layer 15, and the second via contact 85.
    FIG. 2 is an enlarged cross-sectional view of portion 'A' of the apparatus shown in FIG. 1. Referring to FIG. 2, both the first via contact 75 and the second via contact 85 are formed in an anchor 90a, which is both support portions of the actuator 90. The lower electrode 50 of the portion where the first via contact 75 is formed is formed with a circular hole 50a larger than the first via contact 75, so that the first via contact 75 is formed as a lower electrode ( No contact with 50). In addition, referring to FIG. 3, a circular opening 25a larger than the second via contact 85 is formed in the second metal layer 25 in the portion where the second via contact 85 is formed to form the second via contact 85. ) Is not in contact with the second metal layer 25.
    Referring again to FIGS. 1 and 3C, in order to separate the upper electrode 60 without swing for each pixel, the upper electrode 60, the strained layer 55, and the lower portion of one actuator 90 are separated. The electrode 50 is separated from the upper electrode, strain layer and lower electrode of the adjacent actuator.
    Hereinafter, the manufacturing method of the thin film type optical path control apparatus mentioned above is demonstrated. First, a first metal layer 15 is formed on an active matrix 10 having M × N (M, N is an integer) MOS transistors 13 therein, and a part of the first metal layer 15 is removed. Patterning to expose the gate portion of the MOS transistor 13 below it. Thus, the first metal layer 15 is connected to the source and the drain of the MOS transistor 13. The first metal layer 15 is formed of titanium, titanium nitride, tungsten, or the like and includes a drain pad extending from the drain of the transistor 13 to an anchor 90a which is a support of the actuator 90.
    The first passivation layer 20 is formed on the first metal layer 15 and the active matrix 10. The first protective layer 20 is formed of phosphorous silicate (PSG) to have a thickness of about 0.8 to 1.0 µm using a chemical vapor deposition (CVD) method. The first protective layer 20 protects the active matrix 10 in which the MOS transistor 13 is embedded during a subsequent process. The second metal layer 25 is formed on the first protective layer 20. The second metal layer 25 is composed of a titanium layer and a titanium nitride layer. The titanium layer is formed to have a thickness of about 300 kW by sputtering titanium, and the titanium nitride layer is formed to have a thickness of about 1200 kW by depositing titanium nitride by physical vapor deposition (PVD). Since the light incident from the light source is incident not only to the upper electrode 60, which is a reflective layer, but also to a portion other than the portion where the upper electrode 60 is formed, the second metal layer 25 may emit light leakage current into the active matrix 10. To prevent the device from malfunctioning.
    Subsequently, in consideration of the other side of the portion where the support layer 45 formed in a subsequent process contacts the active matrix 10, that is, the position where the second via hole 80 is to be formed, A portion of the second metal layer 25 is etched wider than the second via hole 80 to form a hole 25a in the second metal layer 25 to expose the lower portion of the first protective layer 20. That is, a circular hole 25a larger than the second via hole 80 is formed in the second metal layer 25 on which the second via hole 80 is to be formed.
    Subsequently, a second passivation layer 30 is formed on the exposed first passivation layer 20 and the second metal layer 25. The second passivation layer 30 is formed to have a thickness of about 2000 kPa by depositing phosphorus silicate glass (PSG), which is the same material as the first passivation layer 20, by chemical vapor deposition (CVD). The second protective layer 30, like the first protective layer 20, protects the active matrix 10 in which the MOS transistor 13 is embedded during a subsequent process. An etch stop layer 35 is formed on the second passivation layer 30. The etch stop layer 35 is formed by depositing nitride by low pressure chemical vapor deposition (LPCVD). The etch stop layer 35 prevents the active matrix 10 having the second protective layer 30 and the transistor 13 embedded therein from being etched during a subsequent etching process. The sacrificial layer 40 is formed on the etch stop layer 35. The sacrificial layer 40 is formed to have a thickness of about 2.0 to about 3.0 μm by depositing phosphorus silicate glass (PSG) by an atmospheric pressure chemical vapor deposition (APCVD) method. In this case, since the sacrificial layer 40 covers the upper portion of the active matrix 10 in which the MOS transistor 13 is embedded, the surface flatness is very poor. Accordingly, the surface of the sacrificial layer 40 is polished and planarized so that the sacrificial layer 40 is about 1.1 μm thick by using spin on glass (SOG) or chemical mechanical polishing (CMP).
    Subsequently, the sacrificial layer 40 is patterned by a photolithography process in consideration of a position at which the anchor 90a, which is a support of the actuator 90, is formed, thereby lowering the second metal layer 25 below the etch stop layer 35. ) And the portion adjacent to the hole 25a is formed. The first via contact 75 and the second via contact 85 are formed on one side and the other side of the anchor 90a of the actuator 90 in a subsequent process, respectively.
    A support layer 45 is formed on the exposed etch stop layer 35 and on the sacrificial layer 40. The support layer 45 is formed to have a thickness of about 0.1 to 1.0 탆 using a low pressure chemical vapor deposition (LPCVD) method of a rigid material such as nitride or metal. The lower electrode 50 is formed on the support layer 45. The lower electrode 50 is formed to have a thickness of about 0.01 to 1.0 μm by sputtering a metal having electrical conductivity such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta). do. Next, in consideration of the position where the first via hole 70 to be formed in a subsequent process is formed, a portion of the lower electrode 50 is etched wider than the first via hole 70 by using a photolithography process. The underlying support layer 45 is exposed. That is, a circular hole 50a larger than the first via hole 70 is formed in the lower electrode 50 of the portion where the first via hole 70 is to be formed.
    Subsequently, a strained layer 55 made of a piezoelectric material such as PZT or PLZT is formed on the exposed support layer 45 and the lower electrode 50. The strained layer 55 is formed to have a thickness of 3000 to 6000 kPa, preferably about 4000 kPa using a sol-gel method, a sputtering method, or a chemical vapor deposition method. In addition, the piezoelectric material constituting the strained layer 55 is subjected to heat treatment by a rapid heat treatment (RTA) method to cause phase change. The deformable layer 55 is applied with a second signal (bias signal) to the upper electrode 60 and a first signal (image signal) to the lower electrode 50 so that the upper electrode 60 and the lower electrode 50 are applied. Deformation is caused by the electric field generated by the potential difference therebetween.
    Next, using the photolithography process, the strained layer (from one side of the anchor 90a) adjacent to the portion of the strained layer 55 where the hole 25a of the second metal layer 25 is formed. 55, the first via hole 70 is formed by sequentially etching the support layer 45, the etch stop layer 35, and the second passivation layer 30. Therefore, the first via hole 70 is vertically formed from the strained layer 55 to the second metal layer 25.
    The upper electrode 60 is formed on the strain layer 55 and the first via hole 70 by using a metal having electrical conductivity and reflectivity such as aluminum (Al), silver (Ag), or platinum (Pt). Form. The upper electrode 60 is formed to have a thickness of about 0.01 to 1.0 µm using a sputtering method. When the metal is sputtered as described above, the metal forms the first via contact 75 and the upper electrode 60 while filling the portion where the first via hole 70 is formed. Accordingly, the first via contact 75 connects the upper electrode 60 and the second metal layer 25 to each other. Since the lower hole 50 of the portion where the first via contact 75 is formed is formed with a circular hole 50a larger than the first via contact 75, the first via contact 75 may include a lower electrode ( No contact with 50). Since the upper electrode 60 has excellent electrical conductivity and reflectivity, the upper electrode 60 functions not only as a bias electrode for generating an electric field but also as a mirror for reflecting incident light.
    Subsequently, the upper electrode 60 is patterned to have a predetermined pixel shape by using a photolithography process. At this time, in order to separate the upper electrode 60 for each pixel and form it without swinging, one side of a portion in which the first via hole 70 is formed below the upper electrode 60 of one actuator 90. The upper electrode 60 is patterned so as to be separated from one side of the portion adjacent to the second via hole 80 to be formed in a subsequent process among the upper electrodes 60 of the adjacent actuator (see FIG. 2). In addition, as a result of the above-described process, a stripe 65 is formed on a part of the upper electrode 60. The stripe 65 uniformly operates the upper electrode 60 so that light incident from the light source is deformed at the boundary between the upper electrode 60 and the undeformed portion of the upper electrode 60. Prevents diffuse reflection
    Subsequently, the strained layer 55 is patterned to have a predetermined pixel shape. In this case, a portion in which the second via hole 80 is formed among the deformation layers of the actuator adjacent to a portion in which the first via hole 70 is formed below the deformable layer 55 of the one actuator 90 is formed. The strained layer 55 is patterned to separate (see FIG. 2). Subsequently, after the lower electrode 50 is patterned to have a predetermined shape independent of each pixel, a portion of the lower electrode 50 in which the hole 25a of the second metal layer 25 is formed. The lower electrode 50, the support layer 45, the etch stop layer 35, the second passivation layer 30, and the first passivation layer 20 are sequentially etched from the second via hole 80. . Accordingly, the second via hole 80 is vertically formed from the lower electrode 50 to the drain pad of the first metal layer 15. Since the upper electrode 60 does not exist near the second via hole 80, the second via hole 80 may be formed over a wide portion of the anchor 90a which is a support of the actuator 90. . Next, a metal having electrical conductivity, such as tungsten (W), aluminum (Al), or titanium (Ti), is deposited in the second via hole 80 using a sputtering method to deposit the second via contact 85. ). The second via contact 85 connects the drain pad of the first metal layer 15 and the lower electrode 50 to each other. Therefore, the first signal applied from the outside is applied to the lower electrode 50 through the MOS transistor 13, the drain pad, and the second via contact 85 embedded in the active matrix 10. Since the circular hole 25a larger than the second via contact 85 is formed in the second metal layer 25 in the portion where the second via contact 85 is formed, the second via contact 85 is formed as the second via contact 85. It is not in contact with the metal layer 25.
    Subsequently, the support layer 45 is patterned into a predetermined pixel shape, and then the sacrificial layer 40 is etched using hydrogen fluoride (HF) vapor to form an air gap 95. Complete 90. Then, a rinse and dry treatment is performed to remove the remaining etching solution to complete the thin film AMA device.
    In the above-described thin film type optical path control device, the first signal (image signal) transmitted from the outside is the MOS transistor 13 embedded in the active matrix 10, the drain pad of the first metal layer 15, and the second via contact ( 85 is applied to the lower electrode 50. In this case, since the upper electrode 60 is grounded to the second metal layer 25 through the first via contact 75, no electric current is applied, and thus the electric field according to the potential difference between the upper electrode 60 and the lower electrode 50. This happens. Due to this electric field, the deformation layer 55 between the upper electrode 60 and the lower electrode 50 causes deformation. The deformation layer 55 causes deformation in a direction orthogonal to the electric field, whereby the actuator 90 including the deformation layer 55 is bent upward. Therefore, the upper electrode 60 above the actuator 90 is also bent in the same direction. Light incident from the light source is reflected by the upper electrode 60 bent at a predetermined angle, and then is projected onto a screen to form an image.
    However, in the above-described manufacturing method of the thin film type optical path control apparatus, the strain layer 55 is formed on the support layer 45, so that a crack occurs in the strain layer 55 at a portion of the first via contact 75. If a crack occurs in the strained layer 55 in the region of the first via contact 75, the metal may pass through the crack to form a lower electrode (i.e., the upper electrode 60 and the first via contact 75 through the crack). As a result of being connected to 50, an electrical short occurs between the upper electrode 60 and the lower electrode 50.
    Accordingly, an object of the present invention is to isolate the upper electrode and the lower electrode of the first via contact region by using an isolation layer, and then form the first via contact to close the electrical short between the upper electrode and the lower electrode. It is to provide a method of manufacturing a thin film type optical path control device that can be prevented.
    1 is a plan view of a thin film type optical path adjusting device described in the applicant's prior application.
    FIG. 2 is an enlarged plan view of a portion 'A' of the apparatus shown in FIG. 1.
    3A is a cross-sectional view of the apparatus shown in FIG. 1 taken along line BB '.
    3B is a cross-sectional view of the apparatus shown in FIG. 1 taken along line C-C '.
    3C is a cross-sectional view of the apparatus shown in FIG. 1 taken along line D-D '.
    4 is a plan view of a thin film type optical path control apparatus according to the present invention.
    FIG. 5A is a cross-sectional view of the apparatus shown in FIG. 4 taken along line F-F '. FIG.
    FIG. 5B is a cross-sectional view of the apparatus shown in FIG. 4 taken along the line G-G '.
    FIG. 5C is a cross-sectional view of the device shown in FIG. 4 taken along line H-H '. FIG.
    6A to 7C are cross-sectional views illustrating a method of manufacturing the apparatus shown in FIGS. 5A and 5B.
    <Explanation of symbols for main parts of the drawings>
    100: active matrix 125: first metal layer
    130: first protective layer 135: second metal layer
    140: second protective layer 145: etch stop layer
    150: sacrificial layer 160: support layer
    165: lower electrode 170: strained layer
    175: upper electrode 180: first via hole
    185: first via contact 190: second via hole
    195: second via contact 200: insulating layer
    210: actuator 230: mirror
    In order to achieve the above object of the present invention, the present invention provides an active matrix including a first metal layer having M x N (M, N is an integer) MOS transistor embedded therein and having a drain pad extending from the drain of the transistor. Providing; Forming a protective layer on the active matrix on which the first metal layer is formed; Forming a second metal layer on the passivation layer, and then patterning the second metal layer to form an opening in a portion in which the drain pad is formed below the second metal layer; Forming an etch stop layer on the second metal layer; Forming a sacrificial layer on the etch stop layer, and then patterning the sacrificial layer to expose a portion of the etch stop layer below which an opening of the second metal layer is formed and a portion adjacent thereto; Iii) forming a support layer on top of the exposed etch stop layer and the sacrificial layer, the portion formed on the exposed etch stop layer being an anchor that is a support of the actuator, ii) a lower electrode on top of the support layer, Forming a strained layer and an upper electrode, i) from an upper portion of one side of the anchor to the drain pad through an opening of the strained layer, the lower electrode, the support layer, the etch stop layer, the protective layer, and the second metal layer. After forming a first via hole, forming a first via contact connecting the lower electrode and the drain pad to the inside of the first via hole; iii) the strained layer and the lower electrode from an upper portion of the anchor; Forming a second via hole to the second metal layer through the support layer, the etch stop layer, and the protective layer, and then Forming an insulating layer from an upper portion to a lower electrode in a sidewall of the second via hole, and iii) the upper electrode from the upper electrode to the second metal layer through the insulating layer, the support layer, the etch stop layer, and the protective layer. Forming an actuator comprising forming a second via contact connecting the second metal layer to the second metal layer; And it provides a method of manufacturing a thin film type optical path control device comprising the step of forming a mirror on top of the actuator.
    According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, by separating the upper electrode and the lower electrode of the second via hole region with each other using an insulating layer, even if a crack occurs in the deformation layer of the second via contact region The electrode and the lower electrode may be connected to prevent an electrical short between the upper electrode and the lower electrode. In addition, by interposing the insulating layer, the upper electrode may be more easily connected to the second metal layer through the second via contact, thereby generating a stable electric field between the upper electrode and the lower electrode.
    Hereinafter, with reference to the accompanying drawings will be described in detail a manufacturing method of a thin film type optical path control apparatus according to a preferred embodiment of the present invention.
    4 is a plan view of a thin film type optical path control apparatus according to the present invention, Figure 5a is a cross-sectional view taken the line FF 'of the device of Figure 4, Figure 5b is a cross-sectional view taken the line GG' of the device of Figure 4, FIG. 5C shows a cross-sectional view of the device of FIG. 4 taken along line HH ′. FIG.
    4 to 5C, the thin film type optical path adjusting apparatus according to the present invention includes an active matrix 100, an actuator 210, and a mirror 230.
    The active matrix 100 having M × N (M, N is an integer) P-MOS transistors includes a first metal layer 125 and an upper portion of the first metal layer 125 formed on the active matrix 100. A first passivation layer 130 formed on the second passivation layer 130, a second passivation layer 120 formed on top of the second passivation layer 130, and a second passivation layer 120 formed on top of the first passivation layer 130. The anti-etching layer 125 may be stacked on the passivation layer 115. The first metal layer 105 includes a drain pad extending from the drain 120 of the P-MOS transistor to the anchor 210a which is a support of the actuator 210 to transfer the first signal (image signal). The second metal layer 115 is composed of a titanium layer and a titanium nitride layer.
    The actuator 210 may have one side contacting a portion of the etch stop layer 145 in which the drain pad of the first metal layer 125 is formed and the other side thereof may be horizontally formed through the air gap 155. The upper electrode 165 includes a lower electrode 165 formed on the support layer 160, a strained layer 170 formed on the lower electrode 165, and an upper electrode 175 stacked on the strained layer 170. In addition, referring to FIG. 15, the actuator 210 may include a first via contact 185 formed at one side of an anchor 210a, which is a support of the actuator 210, and a second via contact formed at the other side of the anchor 210a. 195). The first via contact 185 may include a lower electrode 165, a support layer 160, an etch stop layer 145, a second protective layer 140, and a second layer from the strained layer 170 on one side of the anchor 210a. The lower electrode 165 and the drain pad may be connected to each other in the first via hole 180 vertically formed through the opening 138 of the metal layer 135 to the drain pad of the first metal layer 125. From the upper electrode 175 on the other side of the anchor 210a through the strained layer 170, the lower electrode 165, the support layer 160, the etch stop layer 145, and the second protective layer 140, a second metal layer ( The second via hole 190 is vertically formed to 135. An insulating layer 200 is formed in the second via hole 190 from the strained layer 170 to the support layer 160 to separate the upper electrode 175 and the lower electrode 165 around the second via hole 190. do. The second via contact 195 is formed from the upper electrode 175 to the second metal layer 135 through the insulating layer 200, the support layer 160, and the etch stop layer 145 to form the upper electrode 175. The second metal layer 135 is connected. Accordingly, the upper electrodes 175 of the neighboring actuators 210 are connected to each other through the second metal layer 135.
    In addition, referring to FIG. 4, the support layer 160 has a rectangular flat plate integrally with the arms on the same plane between two rectangular arms formed in parallel from both sides of the anchor 210a. It has a formed shape. The mirror 230 is formed on the rectangular flat plate of the support layer 160. Thus, the mirror 230 has the shape of a rectangular flat plate.
    Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.
    6A to 6C are cross-sectional views for explaining the manufacturing method of the device shown in FIG. 5A, and FIGS. 7A to 7C are cross-sectional views for explaining the manufacturing method of the device shown in FIG. 5B.
    6A and 7A, after preparing an active matrix 100, which is an n-type doped silicon (Si) wafer, the active layer 100 may be prepared using a conventional device isolation process, for example, silicon partial oxidation (LOCOS). An isolation layer 105 is formed in the matrix 100 to separate the active region and the field region. Subsequently, after forming the gate 115 made of a conductive material such as polysilicon doped with impurities on the active region, p + source 110 and drain 120 are formed by an ion implantation process, thereby forming M ×. N (M, N is an integer) P-MOS transistors are formed.
    After forming the insulating layer 118 made of oxide on the P-MOS transistor is formed, openings for exposing the top of one side of the source 110 and the drain 120, respectively by a photolithography process. Subsequently, a first metal layer 125 made of a metal such as titanium, titanium nitride, and tungsten (W) is deposited on the resultant, on which the openings are formed, and then the first metal layer 125 is patterned by a photolithography process. The first metal layer 125 patterned as described above includes a drain pad extending from the drain 120 of the P-MOS transistor to an anchor 210a which is a support of the actuator 210.
    The first passivation layer 130 is formed on the first metal layer 125. The first protective layer 110 is formed to have a thickness of about 0.08 to 1.0 µm using the phosphorus silicate glass PSG by chemical vapor deposition (CVD). The first protective layer 130 protects the active matrix 100 in which the MOS transistor is embedded during the subsequent process.
    The second metal layer 135 is formed on the first passivation layer 130. The second metal layer 135 is made of a titanium layer and a titanium nitride layer. The titanium layer is formed to have a thickness of about 300 kW by sputtering titanium, and the titanium nitride layer is formed to have a thickness of about 1200 kW by depositing titanium nitride by physical vapor deposition (PVD). Since the light incident from the light source is incident on the second metal layer 135 as well as the mirror 230, but not at the portion where the mirror 230 is formed, a photo current flows into the active matrix 100. Prevents malfunction. Subsequently, a portion of the second metal layer 135 is etched in consideration of a position at which the first via contact 185 is to be formed later, so that the openings are formed in the second metal layer 135 wider than the first via holes 180 formed later. A portion of the first passivation layer 130 is exposed by forming 138. That is, as shown in FIG. 6A, the opening 138 of the second metal layer 135 is formed only at one lower side of the anchor 210a, which is a support of the actuator 210 formed later.
    The second passivation layer 140 is formed on the second metal layer 135 and the exposed first passivation layer 130. The second protective layer 140 is formed to have a thickness of about 2000 GPa using in-silicate glass (PSG). The second protective layer 140 prevents damage to the active matrix 100 in which the MOS transistor is embedded and the results formed on the active matrix 100 during a subsequent process. An etch stop layer 145 is formed on the second passivation layer 140. The etch stop layer 145 prevents the active matrix 100 and the second passivation layer 140 from being etched due to a subsequent etching process. The etch stop layer 145 is formed to have a thickness of about 1000 to 2000 kPa by depositing nitride by low pressure chemical vapor deposition (LPCVD).
    The sacrificial layer 150 is formed on the etch stop layer 145. The sacrificial layer 150 is formed of phosphorous silicate glass (PSG) having a high concentration of phosphorus (PG) by using the atmospheric pressure chemical vapor deposition method (APCVD). It is formed to have a thickness of about 0㎛. In this case, since the sacrificial layer 130 covers the upper portion of the active matrix 100 in which the MOS transistor is embedded, the surface flatness is very poor. Therefore, by using a spin on glass (SOG) method or a chemical mechanical polishing (CMP) method by polishing the surface of the sacrificial layer 150 so that the sacrificial layer 150 to a thickness of about 1㎛ Planarize. Subsequently, the portion of the sacrificial layer 150 having the opening 138 of the second metal layer 135 formed below and the portion adjacent to the sacrificial layer 150 is etched to expose a portion of the etch stop layer 145. Anchor 210a as a support is formed.
    6B and 7B, the support layer 160 is formed on the exposed etch stop layer 145 and the sacrificial layer 150. The support layer 160 is formed to have a thickness of about 0.1 to 1.0 μm using a low pressure chemical vapor deposition method. In this case, a portion of the support layer 160 formed on the exposed etch stop layer 145 becomes an anchor 210a that is a support of the actuator 210.
    The lower electrode 165 is formed on the support layer 160. The lower electrode 165 is formed to have a thickness of about 0.01 to 1.0 탆 by sputtering a metal such as platinum, tantalum, or platinum-tantalum. At the same time, by separating the lower electrode 165 for each pixel, the lower electrode 165 is iso-cutted so that an independent first signal (image signal) is applied to each pixel. The first signal is applied to the lower electrode 165 through an MOS transistor embedded in the active matrix 100 from the outside.
    A deformation layer 170 made of a piezoelectric material such as PZT or PLZT is formed on the lower electrode 165. The strained layer 170 is formed by depositing a piezoelectric material formed using a sol-gel method by a sputtering method or a chemical vapor deposition (CVD) method so as to have a thickness of 0.1. Form. Subsequently, the piezoelectric material constituting the strained layer 170 is heat-treated by rapid thermal treatment (RTA) to cause phase shift.
    The upper electrode 175 is formed on the strained layer 170. The upper electrode 175 is formed of a metal such as platinum, tantalum, or platinum-tantalum to have a thickness of about 0.01 to 1.0 탆 using a sputtering method.
    6C and 7C, after the first photoresist (not shown) is coated and patterned on the upper electrode 175 by spin coating, the first photoresist is used as a mask. As a result, the upper electrode 175 is patterned to have a mirror-shaped 'c' shape as shown in FIG. 4. Subsequently, after removing the first photoresist, a second photoresist (not shown) is applied and patterned on the patterned upper electrode 175 and the deforming layer 170 by a spin coating method, and then the second Using the photoresist as a mask, the strained layer 170 is patterned to have a mirror-shaped 'c' shape slightly wider than the upper electrode 175 (see FIG. 4). Subsequently, the second photoresist is removed, and a third photoresist (not shown) is applied and patterned on top of the upper electrode 175, the deforming layer 170, and the lower electrode 165. Subsequently, the lower electrode 165 is patterned using a third photoresist as a mask to have a mirror-shaped 'c' shape slightly wider than that of the strained layer 170.
    Subsequently, the strained layer 170, the lower electrode 165, and the support layer 160 are formed from a portion in which the opening 138 of the second metal layer 135 is formed below one side of the anchor 210a, which is a support portion of the actuator 210. ), The etch stop layer 145, the second passivation layer 140, and the first passivation layer 130 are sequentially etched to form a first via from the one side of the strained layer 170 to the drain pad of the first metal layer 125. After the hole 180 is formed, a metal such as tungsten (W), platinum, aluminum, or titanium is sputtered into the first via hole 180 and the drain pad of the first metal layer 125. The first via contact 185 is formed such that the lower electrodes 165 are connected to each other. Therefore, the first via contact 185 is formed from the lower electrode 165 to the top of the drain pad in the first via hole 180. The first signal transmitted from the outside is applied to the lower electrode 165 through the MOS transistor embedded in the active matrix 100, the drain pad of the first metal layer 125, and the first via contact 185.
    In addition, the strained layer 170, the lower electrode 165, the support layer 160, the etch stop layer 145, and the second passivation layer 140 are sequentially etched from the other side of the anchor 210a, which is a support of the actuator 210. The second via hole 190 is formed from the other side of the strained layer 170 to the second metal layer 135. Next, a sputtering method or a low pressure chemical vapor deposition method is performed on the sidewall of the second via hole 190 and the upper portion of the strained layer 170 by using silica (SiO 2 ), amorphous silicon, polysilicon, or the like. After the insulating layer 200 is formed, the insulating layer 200 is patterned to form the insulating layer 200 from the support layer 160 of the sidewall of the second via hole 190 to the upper electrode 175. Be sure to Accordingly, the lower electrode 165 and the upper electrode 175 of the portion of the second via hole 190 are separated from each other by the insulating layer 200. Subsequently, a metal such as tungsten (W), platinum, aluminum, or titanium is sputtered into the second via hole 190 so that the second metal layer 135 and the upper electrode 175 are connected to each other. 2 via contact 195 is formed. Therefore, the second via contact 195 may pass through the insulating layer 200, the support layer 160, the etch stop layer 145, and the second passivation layer 140 from the upper electrode 175 on the second via hole 190. It is formed up to the second metal layer 135. Since the upper electrode 175 is connected to the second metal layer 135 through the second via contact 195 and no signal is applied to the upper electrode 175, when the first signal is applied to the lower electrode 165, the upper electrode 175 is connected to the upper electrode 175. An electric field is generated between the lower electrodes 165 according to the potential difference.
    Subsequently, after applying and patterning a fourth photoresist (not shown) on the patterned lower electrode 165, the first via hole 180, and the second via hole 190 by spin coating, A portion of the support layer 160 that extends from the anchor 210a, which is the support portion, using the fourth photoresist as a mask has a quadrangle shape slightly wider than the lower electrode 165, and is centrally formed on the support layer 160 integrally therewith. Is patterned to have the shape of a rectangular flat plate. That is, as shown in FIG. 4, the support layer 160 has rectangular arms extending from the anchor 210a, and a rectangular flat plate having a larger area between these arms is integral with the arms on the same plane. It has a formed shape. Then, the fourth photoresist is removed. As a result of the patterning of the support layer 160 as described above, a portion of the sacrificial layer 150 is exposed.
    Subsequently, a fifth photoresist (not shown) is coated on the exposed sacrificial layer 150 and the support layer 160 by a spin coating method, and then a rectangular flat plate is formed as a center of the support layer 160. It is patterned to be exposed. In addition, a sputtering method or a chemical vapor deposition method is formed on the upper portion of the center portion of the quadrangular exposed support layer 160 with a thickness of about 0.3 to 2.0 μm of a metal having reflective properties such as silver, platinum, or aluminum. To be deposited. Subsequently, the deposited metal is patterned to form the mirror 195 such that the deposited metal has the same shape as the center portion of the rectangular exposed support layer 160, and then the fifth photoresist is removed.
    Next, the sacrificial layer 150 is removed using hydrogen fluoride (HF) vapor to form an air gap 155 at the position of the sacrificial layer 150, and then rinsed and dried. Complete the thin film optical path control device.
    In the above-described thin film type optical path control device according to the present invention, the first signal applied from the outside is connected to the MOS transistor embedded in the active matrix 100, the drain pad of the first metal layer 125, and the first via contact 185. It is applied to the lower electrode 165 through. At this time, since the upper electrode 175 is connected to the second metal layer 135 through the second via contact 195, an electric field is generated according to a potential difference between the upper electrode 175 and the lower electrode 165. Due to such an electric field, the deformation layer 170 formed between the upper electrode 175 and the lower electrode 165 causes deformation. As the strained layer 170 contracts in a direction perpendicular to the electric field, the actuator 210 including the support layer 160 is bent at a predetermined angle. The mirror 230 reflecting the light incident from the light source is inclined together with the actuator 210 because it is formed on the center portion of the support layer 160. Accordingly, the mirror 230 reflects the incident light at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.
    As described above, according to the manufacturing method of the thin film type optical path control device according to the present invention, the upper electrode and the lower electrode of the second via hole portion are separated from each other by using an insulating layer, so that the cracks of the deformed layer of the second via contact portion are separated. Even if this occurs, the upper electrode and the lower electrode are connected to prevent an electrical short between the upper electrode and the lower electrode. In addition, by interposing the insulating layer, the upper electrode may be more easily connected to the second metal layer through the second via contact, thereby generating a stable electric field between the upper electrode and the lower electrode.
    Although described above with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below I can understand that you can.
    权利要求:
    Claims (3)
    [1" claim-type="Currently amended] Providing an active matrix comprising a first metal layer with M × N (M, N is an integer) embedded therein and having a drain pad extending from the drain of the transistor;
    Forming a protective layer on the active matrix on which the first metal layer is formed;
    Forming a second metal layer on the passivation layer, and then patterning the second metal layer to form an opening in a portion in which the drain pad is formed below the second metal layer;
    Forming an etch stop layer on the second metal layer;
    Forming a sacrificial layer on the etch stop layer, and then patterning the sacrificial layer to expose a portion of the etch stop layer below which an opening of the second metal layer is formed and a portion adjacent thereto;
    Iii) forming a support layer on top of the exposed etch stop layer and the sacrificial layer, the portion formed on the exposed etch stop layer being an anchor that is a support of the actuator, ii) a lower electrode on top of the support layer, Forming a strained layer and an upper electrode, i) from an upper portion of one side of the anchor to the drain pad through an opening of the strained layer, the lower electrode, the support layer, the etch stop layer, the protective layer, and the second metal layer. After forming a first via hole, forming a first via contact connecting the lower electrode and the drain pad to the inside of the first via hole; iii) the strained layer and the lower electrode from an upper portion of the anchor; Forming a second via hole to the second metal layer through the support layer, the etch stop layer, and the protective layer, and then Forming an insulating layer from an upper portion to a lower electrode in a sidewall of the second via hole, and iii) the upper electrode from the upper electrode to the second metal layer through the insulating layer, the support layer, the etch stop layer, and the protective layer. Forming an actuator comprising forming a second via contact connecting the second metal layer to the second metal layer; And
    Method of manufacturing a thin film type optical path control device comprising the step of forming a mirror on top of the actuator.
    [2" claim-type="Currently amended] The thin film type optical path of claim 1, wherein the forming of the insulating layer is performed using any one selected from the group consisting of silica (SiO 2 ), amorphous silicon, and polysilicon. Method of manufacturing the regulating device.
    [3" claim-type="Currently amended] The method of claim 1, wherein the forming of the insulating layer is performed using a sputtering method or a low pressure chemical vapor deposition method.
    类似技术:
    公开号 | 公开日 | 专利标题
    US5920421A|1999-07-06|Thin film actuated mirror array in an optical projection system and method for manufacturing the same
    US6204080B1|2001-03-20|Method for manufacturing thin film actuated mirror array in an optical projection system
    US5886811A|1999-03-23|Thin film actuated mirror array in an optical projection system and method for manufacturing the same
    US6115172A|2000-09-05|Thin film actuated mirror array
    US6052217A|2000-04-18|Thin film actuated mirror array and method for manufacturing the same
    KR0151457B1|1998-12-15|Optical path adjusting device and manufacturing process
    US5754330A|1998-05-19|Thin film actuated mirror array in an optical projection system and method for manufacturing the same
    AU717933B2|2000-04-06|Thin film actuated mirror array in an optical projection system
    US5786928A|1998-07-28|Thin film actuated mirror array in an optical projection system and method for manufacturing the same
    US5917645A|1999-06-29|Thin film actuated mirror array in an optical projection system and method for manufacturing the same
    RU2180158C2|2002-02-27|Thin-film matrix of controlled mirrors for optical projection system and its manufacturing process
    US6005706A|1999-12-21|Thin film actuated mirror array in an optical projection system
    KR100255750B1|2000-05-01|Tma and manufacturing method thereof
    KR0170952B1|1999-03-20|Method for fabricating optical projection system
    KR100233997B1|1999-12-15|Light path apparatus and its fabrication method
    KR100254942B1|2000-05-01|A bonding method of the pad of thin film actuated mirror arrays
    KR100278069B1|2001-01-15|A method for fabricating of actuated mirror array
    KR0154924B1|1998-11-16|Method for manufacturing optical path control apparatus
    KR100207371B1|1999-07-15|Fabrication method for lightpath modulation device
    KR100220691B1|1999-09-15|The fabrication method for thin film actuated mirror array
    KR100237340B1|2000-01-15|Manufacturing method of thin film actuated mirror array for preventing initial tilting of actuator
    KR100209398B1|1999-07-15|Fabrication method for lightpath modulation device
    KR100255749B1|2000-05-01|Tma using ain and manufacturing method thereof
    KR100262734B1|2000-08-01|Apparatus and fabricating method of actuated mirror arrays
    KR100270989B1|2000-11-01|Thin film actuated mirror array and a method for manufacturing the same
    同族专利:
    公开号 | 公开日
    KR100256791B1|2000-05-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-10-30|Application filed by 전주범, 대우전자 주식회사
    1997-10-30|Priority to KR1019970056262A
    1999-05-15|Publication of KR19990034627A
    2000-05-15|Application granted
    2000-05-15|Publication of KR100256791B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970056262A|KR100256791B1|1997-10-30|1997-10-30|Method for manufacturing thin flim actuated mirror array|
    [返回顶部]