专利摘要:
The present invention relates to a variable timing constant decision-directed timing recovery method, the method comprising: outputting an output value and a determination error value of an equalizer in an equalizer, having an absolute value in the determination error value, Comparing the absolute value of the determination error and the value of the threshold detector, selecting the compared output value among the adaptive coefficient values, adding the alpha and beta to the timing constants, and outputting the D / A Controlling the voltage-controlled oscillator through the converter, and optionally varying the timing constant according to the amount of error in the equalizer to accumulate the timing phase and, if the value of the crystal error is large, adjust the adaptive coefficient to a positive value. If the timing phase recovery speed is small and the error is small, it is possible to track the exact phase by applying the negative adaptation coefficient.
公开号:KR19980061566A
申请号:KR1019960080937
申请日:1996-12-31
公开日:1998-10-07
发明作者:민병윤
申请人:이우복;사단법인 고등기술연구원연구조합;
IPC主号:
专利说明:

Variable Timing Constant Decision-Directed Timing Recovery
1 is a diagram illustrating a timing recovery method of a conventional decision-directed method.
2 is a block diagram according to the present invention
Explanation of symbols on the main parts of the drawings
1: equalizer 2: equalizer output value
3: decision error value 4: absolute value
5: adaptation coefficient 6: D / A
7: voltage controlled oscillator
The present invention relates to a variable timing constant decision-directed timing recovery method, and more particularly, to a variable timing constant decision-directed that tracks an accurate phase by selectively changing a constant value according to an amount of error of an equalizer. Timing recovery method.
1 is a diagram illustrating a timing recovery method of a conventional decision-directed method, in which f k + 1 , f k , and f k-1 represent an output value 2 of the equalizer 1, and f k + 1 represents the most recent output of the equalizer. In addition, e k + 1 and e k represent the determination error value (3) of an equalizer. Alpha and beta also represent timing constants and have a fixed value. In the operation, the equalizer 1 outputs the output value 2 and the decision error value 3 of the equalizer, multiplied by the timing constant alpha and beta values, and passed through the D / A converter 6 to oscillation frequency. Shows that the voltage controlled oscillator (Voltage Controlled Oscillator) 7 that changes with the applied voltage is controlled.
The conventional method performs phase recovery by fixing the timing constants alpha and beta. However, if the timing constant is set large, it is difficult to provide an accurate timing phase during the phase recovery process. If the timing constant is set small, sudden phase error occurs during the phase recovery process. There is a problem that takes a long time to adapt to the change.
In order to solve the above problems, when the error value is large using the error value of the equalizer, the adaptive coefficient is set to a positive value and the timing constant is applied to the feedback loop to speed up the timing phase recovery and to reduce the error value. The purpose of the present invention is to track the exact phase by setting the adaptation coefficient to a negative value and applying a small timing constant.
The present invention comprises the steps of outputting the output value and the determination error value of the equalizer in the equalizer, to have an absolute value to the determination error value, the absolute value of the determination error and the threshold detector Comparing the values, selecting the compared output values among the adaptive coefficient values and adding them to the timing constants alpha and beta; and the outputs passing the timing constants pass through a D / A converter to control the voltage controlled oscillator. Characterized in that it comprises a step.
Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
2 is a block diagram according to the present invention, where f k + 1 , f k , f k-1 represent the output value 2 of the equalizer 1 , and f k + 1 represents the most recent output value of the equalizer. . And e k + 1 , e k represent the crystal error value (3) of the equalizer. Referring to the operation of the present invention, the equalizer 1 outputs the output value 2 and the determination error value 3 of the equalizer so that the determination error value has an absolute value 4 and the absolute value of the determination error. And the value of the threshold detector are compared and the compared output value is sent to the adaptive coefficient 5 which selects between a positive value and a negative value. Next, the output passes through the D / A converter 6 to control a voltage controlled oscillator 7 whose oscillation frequency changes with an applied voltage. Here, alpha and beta represent timing constants, and the absolute value of the crystal error is compared with the value of the threshold detector. When the absolute value of the crystal error is large, an adaptive coefficient 5 that is positive is selected. When the absolute value of the determination error is small by comparing the absolute value with the threshold detector value, the adaptive coefficient 5 that is negative is selected.
The present invention accumulates the timing phase by selectively changing the constant of the timing constant according to the amount of error of the equalizer. When the value of the crystal error is large, the adaptive phase is applied with a positive coefficient to speed up the timing phase recovery and the error is increased. If it is small, the correct phase can be tracked by applying the negative adaptation coefficient.
权利要求:
Claims (3)
[1" claim-type="Currently amended] Outputting the output value and the determination error value of the equalizer in the equalizer,
Having an absolute value in the determination error value;
Comparing the absolute value of the determination error with a value of a threshold detector;
Selecting the compared output value from an adaptive coefficient value and adding it to a timing constant alpha and beta;
And outputting the timing constant through a D / A converter to control a voltage controlled oscillator.
[2" claim-type="Currently amended] The method of claim 1,
Improved variable timing constant decision-directed timing by comparing the absolute value of the determination error with the value of the threshold detector and selecting an adaptive coefficient that is positive (+1) when the absolute value of the determination error is large How to recover.
[3" claim-type="Currently amended] The method of claim 1,
A method for recovering a variable timing constant decision-directed timing comprising comparing an absolute value of the determination error with a value of a threshold detector and selecting an adaptive coefficient that is negative (-1) when the absolute value of the determination error is small. .
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同族专利:
公开号 | 公开日
KR100243506B1|2000-02-01|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
1996-12-31|Application filed by 이우복, 사단법인 고등기술연구원연구조합
1996-12-31|Priority to KR1019960080937A
1998-10-07|Publication of KR19980061566A
2000-02-01|Application granted
2000-02-01|Publication of KR100243506B1
优先权:
申请号 | 申请日 | 专利标题
KR1019960080937A|KR100243506B1|1996-12-31|1996-12-31|Variable timing constant decision-directed timing recovery method|
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