• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A manufacturing method of an inductor capable of significantly reducing a leakage current component and a leakage capacitor component to a metal layer or a substrate itself during fabrication of an inductor by using a trench method on a substrate so as to operate at a high frequency and reduce a signal transmission loss . A method of manufacturing an inductor in a semiconductor device for achieving the object of the present invention comprises the steps of sequentially forming an oxide film and a first insulating layer on a substrate; depositing a first metal layer on the first insulating layer, Forming a second insulating layer on the entire surface of the substrate including the wiring layer, depositing and patterning a second metal layer to be used as a mask on the second insulating layer, 3 metal layer as a mask to etch to the depth of the substrate, and then filling the trench with an insulating film to planarize and planarize; forming a connection hole in the wiring layer, forming a third metal layer on the front surface including the connection hole and the trench, A portion of the second metal layer on the insulating film in the trench and a portion of the third metal layer electrically connected to the wiring layer through the connection hole are formed in the And forming an inductor by patterning the metal layer to form an inductor.
    公开号:KR19980059911A
    申请号:KR1019960079257
    申请日:1996-12-31
    公开日:1998-10-07
    发明作者:김기철
    申请人:구자홍；엘지전자 주식회사；
    IPC主号:
    专利说明:

    Method of manufacturing an inductor in a semiconductor device
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an inductor in a semiconductor device, and more particularly, to a method of manufacturing an inductor in a semiconductor device in which a trench is formed in a semiconductor device and a wiring of an inductor is disposed thereon, .
    Generally, as an item for evaluating characteristics of an inductor, there is a Q factor (Q factor) for evaluating a signal transfer characteristic, a resonance frequency representing an operation frequency of the device, and an insertion loss indicating a loss ratio of an amount of power in the device.
    Q = Im (Zin) / I (Zin) where Im (Zin) is an imaginary component value of the inductance of the inductor and Zin is a real component value of the inductance of the inductor. Re (Zin). If the Q value is high, it can be matched with a small loss and can be efficiently used in designing an oscillator.
    On the other hand, because the reflection coefficient at the input S of the inductor 11 and, when the transfer coefficient of the output to the input of the inductor 21 as S, is represented by an insertion loss = │S 21 │ 2/1- │S 11 │ 2.
    In other words, the insertion loss is the amount of power lost in the device, which must also have a small value to reduce the circuit loss.
    Since the parasitic capacitance of S 11 and S 22 , which are the reflection coefficient items of the inductance, the imaginary component becomes negative due to the parasitic capacitance, the inductor becomes the capacitor instead of the inductor and the inductor from this frequency. The higher the better.
    The equivalent circuit of the inductor in the semiconductor device is shown in Fig. Fig L is the inductance of the inductor to be designed at 1, R s is a metal resistance of the inductor, C f is a coupling capacitance between the metal, Cp 1, Cp 2 is the leakage capacitance of the input and output side which is determined according to the properties of the substrate, respectively And Rp1 and Rp2 are leakage resistances on the input and output sides, respectively, which are determined according to the characteristics of the substrate. These equivalent components greatly affect the resonance frequency and the insertion loss value.
    The Q value increases with increasing frequency in the low frequency range, but Q decreases by the parasitic capacitor in the high frequency range. The resonance frequency value increases as the values of the leakage capacitances Cp 1 and Cp 2 decrease. The smaller the values of the leakage capacitances Cp 1 and Cp 2 and the values of the leakage resistances Rp 1 and Rp 2 are, the smaller the hand loss is.
    However, since the inductance element formed in the conventional CMOS is usually formed by forming a thin insulating layer on a substrate or a conductive layer and patterning the inductance element on the insulating layer of the thin film, the leakage capacitances Cp 1 and Cp 2 Value and the leakage resistances Rp 1 and Rp 2 are large, the Q value, insertion loss, and resonance frequency characteristics of the inductor described above are inferior, so that it can not cope with the application of a high frequency integrated circuit which gradually increases.
    SUMMARY OF THE INVENTION Accordingly, the present invention has been made in view of the above problems of the prior art, and it is an object of the present invention to provide a semiconductor device and a method of manufacturing the same, And to provide a manufacturing method of an inductor capable of significantly reducing leakage capacitor components.
    1 is a view showing a layout of an inductor of a first embodiment of the present invention
    FIGS. 2A to 2F are cross-sectional views taken along the line AA 'in FIG. 1, and FIGS. 3A to 3F show a process of manufacturing the inductor according to the first embodiment of the present invention. Fig.
    DESCRIPTION OF THE REFERENCE NUMERALS
    10: substrate 11: oxide film
    12: insulator layer 13: wiring layer
    14: Titanium layer 15: Etching part of titanium in which the inductor is to be formed
    16: trench 17: insulating film
    18: connecting layer 19: metal layer for forming an inductor
    20: Insulation layer
    A method of manufacturing an inductor in a semiconductor device for achieving the object of the present invention comprises the steps of sequentially forming an oxide film and a first insulating layer on a substrate; depositing a first metal layer on the first insulating layer, Forming a second insulating layer on the entire surface of the substrate including the wiring layer, depositing and patterning a second metal layer to be used as a mask on the second insulating layer, 2 metal layer as a mask and etching the metal layer to a depth of the substrate, filling the trench with an insulating film to planarize the metal layer, forming a connection hole to the wiring layer, forming a third metal layer on the entire surface including the connection hole and the trench, A third metal layer portion on the insulating film in the trench and a third metal layer portion electrically connected to the wiring layer through the connection hole, And it is characterized in that it comprises the step of forming an inductor by patterning so as offal.
    According to still another aspect of the present invention, there is provided a method of manufacturing an inductor in a semiconductor device, the method including forming a first insulating layer on a semiconductor substrate, depositing a first metal layer used as a mask on the first insulating layer, Forming a trench structure by etching the first metal layer according to a position at which the inductor is to be formed and using the patterned first metal layer as a mask to the inside of the used substrate; etching the first metal layer to remove the trench, Forming an inductor wiring on the insulating film in the trench by patterning after depositing a second metal layer on the planarized front surface; and forming a second wiring layer on the entire surface including the wiring of the inductor, A step of forming an insulating film, a step of forming a connection hole to communicate with one end of the inductor wiring, Depositing a second metal layer on the soft film is characterized in that the end to be connected to the electrical wiring of the inductor through said connection hole and forming a wiring layer by patterning the third metal layer.
    Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
    Example 1
    FIG. 1 schematically shows an inductor layout of the present invention, and FIGS. 2A to 2F schematically illustrate an inductor manufacturing process of the present invention by using the A-A 'cross section of FIG.
    2E, an SiO 2 oxide film 11 and an insulator layer 12 of Si 3 N 4 are formed on a substrate 10 according to a CMOS process sequence, and a metal layer for wiring is deposited on the insulator layer 12 Then, the wiring layer 13 is formed by patterning.
    An insulator layer 12 'and a titanium (Ti) layer 14 are deposited on the entire surface of the insulator layer 12 including the wiring layer 13 as shown in FIG. 2B. After the inductor is formed, 15 are removed.
    Next, as shown in FIG. 2C, the trench 16 is formed by etching the substrate 14 to the depth of the substrate using the titanium 14 as a mask.
    After the titanium 14 is completely removed as shown in FIG. 2d, the trench 16 is covered with an insulating film 17 such as a nitride film (Si 3 N 4 ) to be planarized and then the connection hole 18 to the wiring layer 13 is formed Then, as shown in FIG. 2E, a metal layer 19 to form an inductor is deposited on the planarized front surface.
    Then, as shown in FIG. 2F, the metal layer 19 is etched so as to leave only portions connected to the insulating film 17 in the trench 16 and the connection holes 18, thereby forming an inductor. Then, The wiring layer 13 connected to one end of the inductor through the hole 18 and the other end of the inductor are connected to the electrodes (a) and (b), respectively.
    Example 2
    In the above embodiment, the inductor is formed first after the wiring layer 13 is formed. In the second embodiment, the inductor is formed first, then the insulation layer is formed, and a wiring layer is formed thereon.
    3A, an oxide film 11 and an insulator layer 12 are formed on a substrate 10 as in the first embodiment, and a titanium (Ti) film 14 is formed on the insulator layer 12 3B, the trench 16 is formed by etching the patterned titanium 14 to a depth of the substrate 10 by using the patterned titanium 14 as a mask. As shown in FIG. 3C, 14 are completely removed and the trench 16 is filled with an insulating film 17 such as a nitride film (Si 3 N 3 ) and then planarized.
    3D, a metal layer 19 for forming an inductor is formed over the planarized surface, and patterned so that the metal layer 19 is left only on the insulating film 17 of the trench 16 as shown in FIG. 3E, 19) are etched.
    The metal layer 19 formed at this time has a wavy line shape as shown in the layout diagram of Fig.
    3F, an insulator layer 20 is formed on the entire surface including the metal layer 19, and then a current collector 18 is formed so as to reach one end of the metal layer 19 by a photo / etching process, A metal layer 13 for wiring is deposited on the insulation layer 20 including the insulation layer 20 and then patterned to form a wiring layer 13 connected to peripheral electrodes (see FIG. 1).
    The lower ends of the remaining inductors are also connected to the surrounding electrodes by forming connecting holes in a usual manner.
    As described above, in the manufacturing method of the present invention, the trenches are formed in the substrate and the insulating layer, the resistive component and the capacitor component are filled in the trench with a very low insulating material, and the wiring for the inductor is formed only on the insulating material. It is possible to significantly reduce the resistance component and the capacitor component to the substrate and greatly improve the characteristics of the value, the insertion loss and the resonance frequency, so that an inductor excellent in signal transmission can be formed even at a high operating frequency even if it is formed in a semiconductor device such as CMOS .
    权利要求:
    Claims (8)
    [1" claim-type="Currently amended] A method for manufacturing a semiconductor device, comprising: sequentially forming an oxide film and a first insulating layer on a substrate; forming a wiring layer by patterning a predetermined shape after depositing a first metal layer on the first insulating layer; Forming a second insulating layer on the second insulating layer; depositing and patterning a second metal layer to be used as a mask on the second insulating layer; etching the second metal layer to a depth inside the substrate using the patterned second metal layer as a mask; Forming a connection hole in the wiring layer, depositing a third metal layer on the entire surface including the connection hole and the tren body, and forming a third metal layer portion on the insulating film in the trench and a second metal layer portion on the insulating film in the trench, And forming an inductor by patterning the third metal layer portion to be electrically connected to the wiring layer, Way.
    [2" claim-type="Currently amended] The inductor manufacturing method according to claim 1, wherein the inductor is formed in a spiral shape, one end of the inductor is connected to one electrode pad through a wiring layer, and the other end is directly connected to another electrode pad.
    [3" claim-type="Currently amended] 2. The method of claim 1, wherein the second metal layer is formed using titanium.
    [4" claim-type="Currently amended] The inductor manufacturing method according to claim 1, wherein the insulating film filling the trench is formed of a nitride film (Si 3 N 4 ).
    [5" claim-type="Currently amended] A method of manufacturing an inductor in a semiconductor device includes forming a first insulating layer on a semiconductor substrate, depositing a first metal layer used as a mask on the first insulating layer, patterning the first metal layer according to a position where the inductor is formed, Forming a trench structure by etching the patterned first metal layer to the inside of the substrate using the mask as a mask; etching and removing the first metal layer, filling the trench with an insulating film and planarizing the planarized structure, Forming an inductor on the insulating film in the trench by depositing and patterning a second metal layer on the front surface; forming a second insulating film on the entire surface including the inductor; forming a connection hole to communicate with one end of the inductor wiring; Depositing a second metal layer on the second insulating film including the connection hole, And forming a wiring layer by patterning the third metal layer so as to be electrically connected to the inductor.
    [6" claim-type="Currently amended] The semiconductor device according to claim 5, wherein the inductor is formed in a spiral shape and one end thereof is connected to one electrode pad through the wiring layer and the other end thereof is connected to another electrode pad through one connection hole / RTI >
    [7" claim-type="Currently amended] 6. The method of claim 5, wherein the first metal layer is formed using titanium.
    [8" claim-type="Currently amended] The inductor manufacturing method according to claim 5, wherein the insulating film filling the trench is formed of a nitride film (Si 3 N 4 ).
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    同族专利:
    公开号 | 公开日
    KR100226835B1|1999-10-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-31|Application filed by 구자홍, 엘지전자 주식회사
    1996-12-31|Priority to KR1019960079257A
    1998-10-07|Publication of KR19980059911A
    1999-10-15|Application granted
    1999-10-15|Publication of KR100226835B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960079257A|KR100226835B1|1996-12-31|1996-12-31|Method for manufacturing inductor of semiconductor device|
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