专利摘要:
The present invention discloses a coupling structure of a semiconductor package and a printed circuit board which can greatly reduce the size and thickness of the semiconductor package. The coupling structure of the disclosed semiconductor package and printed circuit board includes a semiconductor package having a short outlead length; And a printed circuit board having a recessed portion in which the lower molding portion of the semiconductor package is placed and a conductive wiring formed in a portion in which the outlead is in contact with each other.
公开号:KR19980058410A
申请号:KR1019960077734
申请日:1996-12-30
公开日:1998-10-07
发明作者:김성호
申请人:김영환;현대전자산업 주식회사;
IPC主号:
专利说明:

Combined Structure of Semiconductor Package and Printed Circuit Board
The present invention relates to a semiconductor package, and more particularly, to a coupling structure of a semiconductor package and a printed circuit board capable of minimizing a mounting area.
In general, in order to arrange and connect unit cells designed in a chip manufacturing process of a semiconductor device, selective introduction of impurities into predetermined portions of a semiconductor substrate, a lamination process of laminating an insulating layer and a conductive layer, and a pattern mask process are performed in this order. An integrated circuit is formed on each chip.
The integrated circuit chip thus formed is sent to an assembly process and packaged by proceeding in the order of chip cutting, chip attachment, wire bonding, mold, forming, trim process, and the like.
Briefly looking at the manufacturing process of the above-mentioned semiconductor package is as follows.
First, a die bonding process of attaching the semiconductor chips, which are individually separated, on a paddle of the lead frame with an adhesive is performed.
Then, after curing for a predetermined time at a certain temperature, a wire bonding process for electrically connecting the bonding pads of the semiconductor chip and the inner lead of the lead frame with gold wires.
After wire bonding is completed, a molding process of encapsulating a semiconductor chip using an epoxy resin is performed. Therefore, the semiconductor chip can be protected from external thermal and mechanical shocks.
After the molding process is completed, the semiconductor package is processed by a plating process of plating out leads, a forming process of bending out leads into a predetermined form for easy mounting on a substrate, and a trimming process of cutting a dam bar supporting the leads. To manufacture.
1 is a view showing a mounting state of a semiconductor package and a printed circuit board according to a conventional embodiment.
Referring to FIG. 1, the semiconductor package 10 manufactured through the semiconductor package manufacturing process is mounted by welding the formed outlead 3b to the terminals formed on the printed circuit board 5 as lead 6. This is done. In the drawings, reference numeral 1 denotes a semiconductor chip, 2 denotes a paddle on which a semiconductor chip is placed, 3a denotes an inner lead, and 4 denotes a wire.
However, since the conventional semiconductor package as described above has a long outlead, there is a problem that lead frame tilt and mutual flatness do not match when forming for an assembly process.
In addition, when mounting on a printed circuit board, it is difficult to reduce the thickness of the package to be mounted due to package height or size constraints.
Accordingly, the present invention has been made in order to solve the above problems, and by reducing the lead length of the package, providing a printed circuit board having a depression that can be taken out of the package, it is possible to realize a thin and short Its purpose is to provide a coupling structure between a package and a printed circuit board.
1 is a cross-sectional view of a semiconductor package according to the prior art
2A and 2B are exploded cross sectional and exploded perspective views of a semiconductor package according to a first embodiment of the present invention;
3 is a configuration diagram of a lead frame applied to FIGS. 2A and 2B.
4 is a perspective view of a printed circuit board according to a second embodiment of the present invention.
5A and 5B are exploded perspective and partial detailed views of a semiconductor package and a printed circuit board according to a third embodiment of the present invention;
6 is a cross-sectional view of a semiconductor package and a printed circuit board according to the fourth embodiment of the present invention.
* Explanation of symbols for the main parts of the drawings
10 semiconductor package, 20 printed circuit board, 11 semiconductor chip, 12 out lead, 13 gold wire
According to the present invention, a bonding structure of a semiconductor package and a printed circuit board includes a semiconductor package having an outlead length of less than 20 Mil (1 mil = 1 / 1,000 inch = 25 μm); And a printed circuit board having a recessed portion in which the lower molding portion of the semiconductor package is placed and a conductive wiring formed in a portion in which the outer lead contacts.
EXAMPLE
Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
2A and 2B are exploded cross-sectional views and an exploded perspective view of a semiconductor package according to a first embodiment of the present invention.
2A and 2B, the semiconductor package 10 applied to the present embodiment has an out lead 12 length of less than 20 Mil (1 mil = 1 / 1,000 inch = 25 μm), and the printed circuit board 20 is The recessed portion in which the lower molding portion of the semiconductor package 10 is placed and the conductive wiring formed in the portion in which the outlead 12 is in contact with each other. When the semiconductor package 10 and the printed circuit board 20 are coupled to each other, the outlead 12 of the semiconductor package is placed as a recess in an aligned state with the wiring pattern formed on the printed circuit board 20, and the outlead 12 ) And the wiring pattern are electrically coupled to each other.
Conventional package processes are performed in the order of trim, solder plating, forming / singulation, but in the present invention, only the solder plating and silulation processes are simplified.
3 is a configuration diagram of a lead frame applied to FIGS. 2A and 2B.
Referring to FIG. 3, since the trim process is unnecessary in the present invention, the solder plating is performed first, and then the outlead 12 is cut at the dam bar portion C to protrude out of the mold in a subsequent process. ), The lead frame 30 is manufactured so that the odds of ) Are within 20 Mil (1 mil = 1 / 1,000 inch = 25 μm).
In order to provide a lead frame having a short outlead length as described above, the lead frame currently in use may be cut and used at the dam bar portion as described in the previous section, or the dam frame without the lead rod having unnecessary outleads removed. By using, the cost can be reduced.
4 is a perspective view of a printed circuit board according to a second exemplary embodiment of the present invention.
In the case of using the semiconductor package of FIGS. 2A and 2B manufactured using the lead frame shown in FIG. 3, the printed circuit board coupled to the semiconductor package is recessed and aligned only at a portion where the outlead is to be placed, as shown in FIG. 4. And it can be easy to solder.
5A is an exploded perspective view of a semiconductor package and a printed circuit board according to a third exemplary embodiment of the present invention, and FIG. 5B is a partial detailed view of the bottom surface of the semiconductor package applied to FIG. 5A.
Referring to FIGS. 5A and 5B, the semiconductor package 10 according to the present exemplary embodiment forms a groove in a lower surface of the semiconductor package 10, which is coupled to the printed circuit board 20, as shown in FIG. 5B. The printed circuit board 20 has a protruding portion to be inserted into the groove of the semiconductor package 10, and the wiring pattern is formed up to the protruding portion so as to be defective with the lead frame formed in the groove. Therefore, in the case of the third embodiment described above, alignment between the lead frame of the semiconductor package 10 and the wirings of the printed circuit board 20 can be facilitated without any special alignment. 6 is a cross-sectional view of a semiconductor package and a printed circuit board 20 according to a fourth embodiment of the present invention.
Referring to FIG. 6, in the case of using a reverse type semiconductor package in which semiconductor packages are coupled in pairs on the top and bottom surfaces, each semiconductor package uses the semiconductor package shown in FIGS. 2A and 2B, and the printed circuit board coupled thereto is a semiconductor. The package has a through hole in which it is placed.
During assembly, one semiconductor package is soldered by being mounted on the top surface of the printed circuit board 20 with the protruding outlead 12 aligned with the wiring pattern of the printed circuit board 20. 10 is mounted in a state where the outlead 12 protruding from the other surface is aligned with the wiring pattern of the printed circuit board 20.
As described above, the coupling structure of the semiconductor package and the printed circuit board of the present invention shortens the lead length of the semiconductor package, and grooves or through-holes are provided in portions where the semiconductor package of the printed circuit board on which the semiconductor package is mounted is mounted. By forming the inter-bonding to simplify the manufacturing process of the package, it is possible to reduce the cost and the coupling occurring during the processing of the outlead.
In addition, lead leads can be made without dam bars, allowing more packages to be made in strips of the same size.
In addition, when the present invention is applied to a reverse type semiconductor package, since a separate lead frame is not required, manufacturing cost can be reduced.
In addition, by forming grooves or through-holes in the printed circuit board to bond the semiconductor packages, the semiconductor package can be made thin and short.
Although specific embodiments of the present invention have been described and illustrated herein, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.
权利要求:
Claims (6)
[1" claim-type="Currently amended] A semiconductor package having a short outlead length; And a printed circuit board having a recess in which a lower molding part of the semiconductor package is placed and a printed circuit board having conductive wires formed in a portion in which the outer lead contacts.
[2" claim-type="Currently amended] The structure of claim 1, wherein the length of the outlead is less than 20 Mil (1 mil = 1 / 1,000 inch = 25 μm).
[3" claim-type="Currently amended] The structure of claim 1, wherein the printed circuit board coupled to the semiconductor package has a structure in which a groove is formed only in a portion where an outlead is to be placed.
[4" claim-type="Currently amended] The semiconductor package of claim 1, wherein the semiconductor package is a reverse type in which semiconductor packages are coupled in pairs on upper and lower surfaces, and the printed circuit board is interposed between the protruding outleads of the bonded semiconductor package. A coupling structure of a semiconductor package and a printed circuit board, wherein the wiring of the circuit board is an electrical contact structure.
[5" claim-type="Currently amended] The structure of any one of claims 1 to 4, wherein the lead frame of the semiconductor package has a structure in which an outlead outside the dam bar is cut.
[6" claim-type="Currently amended] The semiconductor package of claim 1, wherein the semiconductor package has a groove formed in a lower surface thereof coupled to a printed circuit board, and a bottom surface of the groove has a lead surface exposed, and the printed circuit board is formed of the semiconductor package. And a wiring pattern to be inserted into the groove, and the wiring pattern is formed up to the protrusion to be coupled to the lead frame formed in the groove.
类似技术:
公开号 | 公开日 | 专利标题
US6815257B2|2004-11-09|Chip scale package and method of fabricating the same
US6630729B2|2003-10-07|Low-profile semiconductor package with strengthening structure
US6784525B2|2004-08-31|Semiconductor component having multi layered leadframe
KR0128251Y1|1998-10-15|Lead exposed type semiconductor device
US6984880B2|2006-01-10|Leadframe, resin-molded semiconductor device including the leadframe, method of making the leadframe and method for manufacturing the device
JP2819285B2|1998-10-30|Stacked bottom lead semiconductor package
US7488620B2|2009-02-10|Method of fabricating leadframe based flash memory cards including singulation by straight line cuts
US6781243B1|2004-08-24|Leadless leadframe package substitute and stack package
US6437449B1|2002-08-20|Making semiconductor devices having stacked dies with biased back surfaces
US6951982B2|2005-10-04|Packaged microelectronic component assemblies
US6541307B2|2003-04-01|Multimedia chip package
JP2967344B2|1999-10-25|Stacked semiconductor package module and manufacturing method of stacked semiconductor package module
KR970010678B1|1997-06-30|Lead frame and the package thereof
US6339260B1|2002-01-15|Wire arrayed chip size package
KR940007757Y1|1994-10-24|Semiconductor package
US6781240B2|2004-08-24|Semiconductor package with semiconductor chips stacked therein and method of making the package
US6429508B1|2002-08-06|Semiconductor package having implantable conductive lands and method for manufacturing the same
TWI385763B|2013-02-11|Quad flat non-lead semiconductor package and method for making quad flat non-lead semiconductor package
KR100265563B1|2000-09-15|Ball grid array package and fabricating method thereof
US6841414B1|2005-01-11|Saw and etch singulation method for a chip package
US5874784A|1999-02-23|Semiconductor device having external connection terminals provided on an interconnection plate and fabrication process therefor
KR0152901B1|1998-10-01|Plastic package and method for manufacture thereof
US5615089A|1997-03-25|BGA semiconductor device including a plurality of semiconductor chips located on upper and lower surfaces of a first substrate
US8551820B1|2013-10-08|Routable single layer substrate and semiconductor package including same
US5866948A|1999-02-02|Interposer for semiconductor device
同族专利:
公开号 | 公开日
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
1996-12-30|Application filed by 김영환, 현대전자산업 주식회사
1996-12-30|Priority to KR1019960077734A
1998-10-07|Publication of KR19980058410A
优先权:
申请号 | 申请日 | 专利标题
KR1019960077734A|KR19980058410A|1996-12-30|1996-12-30|Combined structure of semiconductor package and printed circuit board|
[返回顶部]