• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention provides a method of manufacturing a semiconductor device capable of preventing leakage current and damage to a substrate by injecting predetermined plug ions after forming a contact hole and continuously performing rapid heat treatment to activate plug ions. Providing a semiconductor substrate in which an active region and an inactive region are separated by a field oxide film formed thereon; Forming a gate insulating film and a gate on the substrate in the active region and forming an LDD region in the substrate on both sides of the gate; Forming an insulating film on the entire surface of the substrate; Etching the insulating film to expose a portion of the LDD region to form a contact hole; Implanting plug ions into the exposed substrate at the bottom of the contact hole; And activating by heating the plug ions.
    公开号:KR19980058394A
    申请号:KR1019960077718
    申请日:1996-12-30
    公开日:1998-10-07
    发明作者:신충식；이찬용
    申请人:김영환；현대전자산업 주식회사；
    IPC主号:
    专利说明:

    Manufacturing method of semiconductor device
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device capable of preventing a predetermined leakage current and damage to a substrate generated when forming a contact hole.
    In a typical semiconductor device, contact holes are formed for electrical connection between the substrate and the upper layers. In this case, the contact hole forms an insulating film for insulation between the substrate and the upper layer, and then forms a predetermined photoresist pattern on the insulating film by photolithography, and the substrate is exposed by etching the lower insulating film using the photoresist pattern. By forming.
    FIG. 1 is a cross-sectional view illustrating a conventional method for forming a bit line of a semiconductor device, with reference to FIG. 1.
    As shown in FIG. 1, the gate insulating film 3 and the gate 4 are formed on the active region of the semiconductor substrate 1 in which the active and inactive regions are formed by the field oxide film 2. Subsequently, an LDD (Lightly Doped Drain) region 5 is formed in the substrate 1 on both sides of the gate 4, and oxide film spacers 6 are formed on both sidewalls of the gate 4, and then insulating and An insulating film 7 for planarization is formed. Then, a predetermined mask pattern (not shown) is formed on the insulating film 7 by photolithography, and the insulating film 7 is etched using the mask pattern to form the LDD region 5 on one side of the gate 4. A predetermined portion is exposed to form a contact hole. A polysilicon film is formed on both sidewalls and bottoms of the contact hole and the insulating film 7, and patterned to form a predetermined shape to form a bit line 8.
    However, in the above-described conventional contact hole forming method, the misalignment of the mask pattern occurs due to the reduction of the cell area due to the high integration of the device, and the contact is partially etched in the field oxide film as the field oxide film is partially etched during the etching using the mask pattern. It occurs when formed. Accordingly, a PN junction is formed between the channel stop ion region formed under the field oxide film and the impurities of the polysilicon film contacted through the contact hole to generate a leakage current. On the other hand, in the past, predetermined plug ions were implanted after the formation of the contact hole. However, since the problem of damaging the substrate due to the implantation of such plug ions occurs, it is difficult to prevent leakage current.
    Accordingly, the present invention has been made in view of the above-mentioned problems. After the formation of the contact hole, a predetermined plug ion is implanted and a rapid heat treatment process is performed to activate the plug ion to prevent leakage current and damage the substrate. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be prevented.
    1 is a cross-sectional view illustrating a conventional method for manufacturing a semiconductor device.
    2A through 2C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.
    3A to 3C are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with another embodiment of the present invention.
    * Explanation of symbols for the main parts of the drawings
    11 semiconductor substrate, 12 field oxide film, 13 gate insulating film, 14 gate, 15 LDD region, 16 oxide film spacer, 17 insulating film, 18 contact hole, 19 plug ion implantation region, 20 bit line
    According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method including: providing a semiconductor substrate in which an active region and an inactive region are separated by a field oxide film formed thereon; Forming a gate insulating film and a gate on the substrate of the active region and forming an LDD region in the substrate on both sides of the gate; Forming an insulating film on the entire surface of the substrate; Etching the insulating layer to expose a portion of the LDD region to form a contact hole; Implanting plug ions into the exposed substrate at the bottom of the contact hole; And activating the plug ions by heat treatment.
    In addition, when the contact hole is formed, the field oxide layer in a portion in contact with the LDD region is etched by a predetermined portion, and the implanting of the plug ions and the heat treatment of the plug ions are continuously performed.
    In addition, the heat treatment process is characterized in that to proceed to the rapid heat treatment process.
    The method may further include forming insulating film spacers on both sidewalls of the contact hole between forming the contact hole and implanting the plug ions.
    According to the present invention having the above configuration, by implanting a predetermined plug ion after the formation of the contact hole, and proceeds a rapid heat treatment process to activate the plug ion can prevent leakage current and damage to the substrate.
    EXAMPLE
    Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.
    2A to 2C are cross-sectional views illustrating a method of forming a bit line of a semiconductor device in accordance with an embodiment of the present invention.
    First, as shown in FIG. 2A, a gate insulating layer 13 and a gate 14 are formed on the active region of the semiconductor substrate 11 in which the active region and the inactive region are separated by the field oxide film 12 formed thereon. Form. Next, LDD (Lightly Doping Drain) ions are implanted into the substrate 11 on both sides of the gate 14 to form the LDD region 15.
    As shown in FIG. 2B, an oxide film is deposited on the structure of FIG. 2A, and the oxide film is anisotropically blanket-etched to form oxide spacers 16 on both sidewalls of the gate 14. Subsequently, an insulating film 17 for insulating and planarization is formed on the entire surface of the substrate, and a predetermined mask pattern (not shown) is formed on the insulating film 17 by photolithography. The lower insulating layer 17 is etched using the mask pattern to expose a portion of the LDD region 15 on one side of the gate 14 to form a contact hole 18, and the mask pattern is removed by a known method. .
    However, a misalignment of the mask pattern occurs due to a decrease in cell size, and thus the field oxide layer 12 is partially etched during the etching. Therefore, after the contact hole 18 is formed, the plug ion is implanted into the substrate 11 at the bottom of the contact hole 18 by using source ions such as LDD ions to form the LDD region 15 and the partially etched field oxide film 12. The plug ion implantation region 19 is formed in the lower portion thereof, thereby preventing the occurrence of leakage current in the formation of the bit line in contact with the contact hole 18. Then, a rapid thermal process (RTP) is performed continuously to activate the plug ions to recover the substrate 11 damaged by the plug ion implantation.
    As shown in FIG. 2C, a polysilicon film is formed on both sidewalls and bottoms of the contact holes 18 and the insulating film 17, and patterned to form a bit line 20.
    In addition, a contact hole for a storage node contact of the capacitor may be formed in the above manner.
    The contact hole may be formed on both sidewalls of the contact hole.
    That is, FIGS. 3A to 3C are cross-sectional views illustrating a method of forming a bit line of a semiconductor device in accordance with another embodiment of the present invention.
    First, as shown in FIG. 3A, a gate insulating film 23 and a gate 24 are formed on the active region of the semiconductor substrate 21 in which the active region and the inactive region are separated by the field oxide film 12 formed thereon. Form. Subsequently, LDD (Lightly Doping Drain) ions are implanted into the substrate 21 on both sides of the gate 24 to form the LDD region 25, and the oxide spacer 26 is formed on both sidewalls of the gate 24. Subsequently, an insulating film 27 for insulating and planarization is formed on the entire surface of the substrate, and a predetermined mask pattern (not shown) is formed on the insulating film 27 by photolithography. The lower insulating layer 27 is etched using the mask pattern to expose a portion of the LDD region 25 on one side of the gate 24 to form a contact hole 28, and the mask pattern is removed by a known method. .
    As shown in FIG. 3B, an insulating film is formed on the structure of FIG. 2A, and an anisotropic blanket is etched to form an insulating film spacer 29 on both sidewalls of the contact hole 28. However, due to a decrease in cell size, misalignment of the mask pattern occurs, and a portion of the field oxide layer 22 is etched during etching to form the contact hole 28. Accordingly, the plug oxide is implanted into the substrate 21 at the bottom of the contact hole 28-1 on which the insulating film spacer 29 is formed, and the field oxide layer 22 partially etched with the LDD region 25 by implanting plug ions with the source ions. A predetermined plug ion region 30 is formed in the lower portion, thereby preventing the occurrence of leakage current when forming a bit line contacting through the contact hole 28. Then, rapid thermal treatment is performed continuously to activate the plug ions to recover the substrate 21 damaged by the plug ion implantation.
    As shown in FIG. 3C, a polysilicon film is formed on both sidewalls and bottoms of the contact holes 28-1 on which the insulating film spacers 29 are formed and on the insulating film 27, and patterned into predetermined shapes to form the bit lines 31. To form.
    In addition, a contact hole for a storage node contact of the capacitor may be formed in the above manner.
    According to the above embodiment, after the contact hole is formed, predetermined plug ions are implanted and rapid thermal treatment is performed to activate the plug ions to prevent leakage current and damage to the substrate. Therefore, the reliability and yield of an element can be improved.
    In addition, this invention is not limited to the said Example, It can implement in a various deformation | transformation in the range which does not deviate from the technical summary of this invention.
    权利要求:
    Claims (6)
    [1" claim-type="Currently amended] Providing a semiconductor substrate in which an active region and an inactive region are separated by a field oxide film formed thereon;
    Forming a gate insulating film and a gate on the substrate of the active region and forming an LDD region in the substrate on both sides of the gate;
    Forming an insulating film on the entire surface of the substrate;
    Etching the insulating layer to expose a portion of the LDD region to form a contact hole;
    Implanting plug ions into the exposed substrate at the bottom of the contact hole; And,
    And heating the plug ions to activate the semiconductor device.
    [2" claim-type="Currently amended] The method of claim 1, wherein the field oxide layer in a portion in contact with the LDD region is partially etched when the contact hole is formed.
    [3" claim-type="Currently amended] The method of claim 1, wherein the plug ions are ions of the same source as the ions of the LDD region.
    [4" claim-type="Currently amended] The method of claim 1, wherein the implanting of the plug ions and the heat treatment of the plug ions are performed continuously.
    [5" claim-type="Currently amended] The method of claim 4, wherein the heat treatment process is a rapid heat treatment process.
    [6" claim-type="Currently amended] The method of claim 1, further comprising forming insulating film spacers on both sidewalls of the contact hole between forming the contact hole and implanting the plug ions.
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    同族专利:
    公开号 | 公开日
    KR100230737B1|1999-11-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-30|Application filed by 김영환, 현대전자산업 주식회사
    1996-12-30|Priority to KR1019960077718A
    1998-10-07|Publication of KR19980058394A
    1999-11-15|Application granted
    1999-11-15|Publication of KR100230737B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960077718A|KR100230737B1|1996-12-30|1996-12-30|Manufacturing method of semiconductor device|
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