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    • 专利摘要:
    A laser diode (200) of the VCSEL type, and a manufacturing method thereof, the laser diode (200) having superposed over a substrate (210): a lower Bragg mirror (230), a well area (s) quantum (s) (240), and an upper Bragg mirror (250). A section (SA) of the lower Bragg mirror has an area smaller than that of a section (SB) of the upper Bragg mirror, said sections being defined in planes parallel to the plane of the substrate. The laser diode (200) also comprises a so-called peripheral region (270), consisting of a so-called confinement material, located between the substrate and the upper Bragg mirror, and surrounding the lower Bragg mirror (230) at least. Thanks to the special geometry of the laser diode, the charge carriers are confined, in operation, in the center of the latter.
    公开号:FR3079681A1
    申请号:FR1852737
    申请日:2018-03-29
    公开日:2019-10-04
    发明作者:Nicolas Olivier；Christophe Jany
    申请人:Commissariat a lEnergie Atomique CEA；Commissariat a lEnergie Atomique et aux Energies Alternatives CEA；
    IPC主号:
    专利说明:

    CARRIER CONTAINMENT VCSEL LASER DIODE AND MANUFACTURING METHOD THEREOF
    DESCRIPTION
    TECHNICAL AREA
    The invention relates to the field of laser diodes which are optoelectronic components based on semiconductor materials capable of emitting light. It relates more particularly to the field of laser diodes with vertical cavity emitting by the surface, or VCSEL (for English “vertical-cavity surface-emitting laser”).
    PRIOR STATE OF THE ART
    A VCSEL type laser diode consists of a stack comprising, superimposed above a substrate, a zone with quantum well (s) and two Bragg mirrors. The two Bragg mirrors together form an optical cavity, inside which is the quantum well (s) area. In operation, a laser beam emerges from the optical cavity, oriented along an axis orthogonal to the substrate.
    FIG. 1 illustrates a VCSEL type laser diode according to the prior art, made of Aluminum (Al), Galium (Ga) and Arsenic (As). The laser diode 100 is shown in a sectional view in the plane (yOz) of an orthonormal reference (Oxyz). The plane (xOy) extends parallel to the plane of a substrate 110.
    The laser diode 100 comprises, superimposed above the substrate 110:
    - a buffer zone 120, having a first type of doping, N or P;
    - A lower Bragg mirror 130, highly reflecting at an emission wavelength of the laser diode 100;
    - an area with quantum well (s) 140, capable of emitting photons in response to an excitation supplied by an electric current;
    - A confinement layer 170, described below;
    - an upper Bragg mirror 150, highly reflecting at an emission wavelength of the laser diode 100; and
    - A contact area 160 having a second type of doping, P or N, of the type opposite to the first type of doping.
    In FIG. 1, there is also shown:
    - An upper metal electrode 180B, located on an upper face of the contact area 160, and open in the center to let the laser beam emitted by the diode, in operation; and
    - a lower metal electrode 180A.
    Excitation in the quantum well (s) area 140 is obtained by injection of electric charge carriers, using an electric current flowing through the laser diode from top to bottom, between the upper metal electrode 180B and the lower metal electrode 180A.
    In order to obtain the most directive laser emission possible, along the axis (Oz) orthogonal to the plane of the substrate 110, it is known to channel the injection of carriers towards the center of the laser diode.
    In the example illustrated in FIG. 1, the charge carriers are guided towards the center of the laser diode by means of the confinement layer 170. It is a thin layer based on AIGaAs, highly enriched in aluminum and laterally oxidized. The confinement layer 170 therefore comprises a peripheral region, with a high content of aluminum oxide, surrounding a non-oxidized central region. Lateral oxidation is obtained by annealing in a medium highly enriched in oxygen. In operation, the peripheral region pushes the carriers towards the central region, and confines them in a central region of the laser diode 100.
    This solution is described for example in an article by M. S. Alias & al., “Optimization of Electro-Optical Characteristics of GaAs-based Oxide Confinement VCSEL”, LASER PHYSICS, Vol. 20, No. 4, 2010, pp. 806-810.
    This solution nevertheless poses difficulties in terms of repeatability, linked in particular to the control of the thickness of the confinement layer, to the control of its aluminum composition, and to the control of the lateral oxidation process. It is therefore difficult to produce series of laser diodes having constant electrooptical characteristics on the scale of the laser diode but also from one laser diode to another. These difficulties increase with the size of the substrate, when numerous diodes are produced jointly on the same substrate, by depositing layers over large surfaces and then etching trenches to isolate the diodes from each other.
    Another known solution, to confine the carriers to the center of the laser diode, consists in carrying out an ion implantation of protons in a peripheral region of the upper Bragg mirror. In this case, the laser diode does not include the confinement layer enriched with aluminum, and the difficulties described above are overcome. On the other hand, ion implantation can create damage in the crystal lattice of the laser diode detrimental to the quality of the laser emission. In addition, the implanted protons are distributed, in the laser diode, in a pear-shaped volume. This solution is therefore unsuitable for small laser diodes.
    An objective of the present invention is to propose a solution for confining charge carriers at the center of a laser diode of the VCSEL type, and not having the drawbacks of the prior art.
    In particular, an objective of the present invention is to provide a VSCEL type laser diode in which a solution for confining charge carriers at the center of the laser diode can be implemented using a method having a large repeatability.
    STATEMENT OF THE INVENTION
    This objective is achieved with a laser diode comprising, superimposed above a substrate, along an axis orthogonal to the plane of said substrate:
    a lower Bragg mirror, an area with quantum well (s), and an upper Bragg mirror, with the lower Bragg mirror located between the substrate and the area with quantum well (s).
    The laser diode according to the invention is therefore a laser diode of the VCSEL type.
    According to the invention, a section of the lower Bragg mirror has a smaller area than that of a section of the upper Bragg mirror, said sections being defined in planes parallel to the plane of the substrate.
    In addition, the laser diode according to the invention comprises a so-called peripheral region, made up of a so-called confinement material, situated between the substrate and the upper Bragg mirror, and surrounding at least the lower Bragg mirror.
    In operation, the charge carriers are confined to the center of the laser diode, by construction, thanks to the reduced section of the lower Bragg mirror. In other words, the invention provides spatial confinement of the charge carriers, using a particular geometry of the laser diode.
    As in the prior art, confinement makes it possible to obtain a laser emission of high directivity, oriented along an axis orthogonal to the plane of the substrate. The containment solution proposed by the invention does not involve either ion implantation or lateral oxidation of a containment layer. The confinement is obtained by an adequate dimensioning of the lower Bragg mirror relative to the upper Bragg mirror. This confinement solution can be implemented by simple etching of layers with the desired dimensions, that is to say by a process having high repeatability. This high repeatability makes it possible in particular to homogenize the optical performances, in particular in terms of optical aperture, of laser diodes produced together on the same substrate.
    The invention also makes it possible to release constraints on the epitaxy of the layers forming the laser diode, by increasing the tolerances on the thickness and the composition of each layer, in comparison with the prior art comprising a confining layer oxidized laterally. It allows in particular to overcome the constraints on the epitaxy of a confinement layer enriched with aluminum.
    In solutions of confinement by ion implantation or lateral oxidation of a confinement layer, miniaturization of the laser diode is limited by a minimum volume occupied by ion implantation or by the oxidized material. The solution proposed by the invention overcomes these limitations, and thus gives access to laser diodes of smaller dimensions than in the prior art. The laser diodes according to the invention can in particular be distributed in a matrix, distributed according to a reduced distribution pitch, less than or equal to 5 μm.
    The containment of carriers is implemented thanks to the dimensions of the lower Bragg mirror. The upper Bragg mirror can on the other hand have a wide section, facilitating the production of an upper electrode of the laser diode, on the side of the quantum well (s) zone opposite the substrate.
    Preferably, the laser beam emitted in operation by the laser diode emerges from it by passing through the upper Bragg mirror. For this, the lower Bragg mirror has a higher reflectivity than that of the lower Bragg mirror, at an emission wavelength of the laser diode. An upper electrode of the laser diode is therefore advantageously open in the center, to let the laser beam pass. The realization of an upper electrode open in the center is facilitated by the larger section of the upper Bragg mirror, greater than that of the lower Bragg mirror.
    The laser diode according to the invention advantageously comprises:
    a first stack, cylindrical, comprising at least the lower Bragg mirror, and having a first section in a plane parallel to the plane of the substrate; and a second stack, cylindrical, comprising at least the upper Bragg mirror, and having a second section in a plane parallel to the plane of the substrate;
    with the quantum well (s) area that belongs to the first or second stack, and the area of the first section less than the area of the second section.
    The term “cylindrical” here refers to a straight cylinder, of generator orthogonal to the plane of the substrate, but not necessarily a cylinder of revolution.
    The peripheral region extends between the substrate and the second stack, surrounding the first stack.
    Preferably, the laser diode according to the invention comprises at least one upper electrode, which extends in whole or in part on side walls of the upper Bragg mirror.
    The invention also covers a method of manufacturing a laser diode according to the invention, the method comprising:
    a first etching step, in which an initial series of layers is etched, comprising at least a first set of elementary optically reflecting layers, so as to form a first stack comprising at least the lower Bragg mirror;
    a second etching step, in which a second series of layers is etched comprising, at least, a second set of elementary optically reflecting layers, so as to form a second stack comprising at least the upper Bragg mirror; and a step of lateral encapsulation of the first stack, implemented after the first etching step;
    a section of the first stack having an area smaller than that of a section of the second stack, and the second etching step being implemented after the first etching step.
    According to a first embodiment of the invention, the method comprises the following steps:
    a first epitaxy, on a first substrate, to form the first series of layers;
    the first etching step, to form the first stack comprising at least the lower Bragg mirror;
    the lateral encapsulation step, at the end of which a first, flat structure is obtained on the first substrate;
    a second epitaxy, on a second substrate separate from the first substrate, to form the second series of layers, the second series of layers and the second substrate together forming a second structure;
    a transfer of the second structure onto the first structure, followed by a withdrawal of the second substrate; and the second etching step, implemented after the postponement step, to form the second stack comprising at least the upper Bragg mirror.
    The first epitaxy and the second epitaxy can be implemented at least partially simultaneously.
    According to a second embodiment of the invention, the method comprises the following steps:
    a first epitaxy, on a first substrate, to form the first series of layers;
    the first etching step, to form the first stack comprising at least the lower Bragg mirror;
    the lateral encapsulation step, at the end of which a first, flat structure is obtained on the first substrate;
    a new epitaxy, on the first structure, to form the second series of layers; and the second etching step, implemented after the new epitaxy, to form the second stack comprising at least the upper Bragg mirror.
    According to a third embodiment of the invention, the method comprises the following steps:
    epitaxy, on a first substrate, to form a series of layers comprising the second series of layers and the first series of layers;
    the first etching step, to form the first stack comprising at least the lower Bragg mirror;
    the lateral encapsulation step, at the end of which a so-called inverted planar structure is obtained on the first substrate;
    a transfer, on a second substrate, of the assembly formed by the first substrate and the inverted structure, followed by a withdrawal of the first substrate; and the second etching step, implemented after the postponement step, to form the second stack comprising at least the upper Bragg mirror.
    The lateral encapsulation step of the first stack can include sub-steps for depositing an encapsulation layer and planarization.
    Alternatively, the step of lateral encapsulation of the first stack may include a step of growing a confinement material.
    Advantageously, the method according to the invention comprises a step of producing an upper electrode, implemented after the second etching step, and so that said upper electrode extends in whole or in part on side walls of the first stack.
    BRIEF DESCRIPTION OF THE DRAWINGS
    The present invention will be better understood on reading the description of exemplary embodiments given purely by way of non-limiting indication, with reference to the appended drawings in which:
    - Figure 1 schematically illustrates a VCSEL type laser diode according to the prior art, in a sectional view;
    - Figure 2 schematically illustrates a first embodiment of a VCSEL type laser diode according to the invention, in a sectional view;
    - Figures 3 and 4 respectively illustrate a second and a third embodiment of a VCSEL type laser diode according to the invention, in a sectional view;
    - Figure 5 schematically illustrates a first embodiment of a manufacturing method according to the invention; and
    - Figures 6 and 7 respectively illustrate a second and a third embodiment of a method according to the invention.
    DETAILED PRESENTATION OF PARTICULAR EMBODIMENTS
    FIG. 2 illustrates a first embodiment of a laser diode 200 according to the invention. The laser diode 200 is shown in a sectional view in the plane (yOz) of an orthonormal reference (Oxyz).
    A substrate 210, also called host substrate, has the shape of a rectangular parallelepiped with a lower face 211 and an upper face 212 which each extend along a plane parallel to the plane (xOy). The plane of the substrate is defined as a plane parallel to this plane (xOy). The substrate 210 is for example made of gallium arsenide (GaAs).
    The laser diode 200 comprises, superimposed in this order above the substrate 210, along an axis (Oz) orthogonal to the plane of the substrate:
    - a buffer zone 220 (optional), here consisting of a thin layer of doped GaAs, with a first type of doping, N or P;
    - a lower Bragg mirror 230, highly reflecting at an emission wavelength of the laser diode 200, constituted here by an alternation of layers of gallium arsenide (GaAs) and layers of gallium arsenide- aluminum (AIGaAs);
    a zone with a quantum well (s) 240, constituted here by at least one quantum well formed by a stack of at least one layer of gallium arsenide (GaAs) and at least one layer of arsenide d 'indium or indium gallium arsenide (In (Ga) As);
    - an upper Bragg mirror 250, highly reflecting at an emission wavelength of the laser diode 200, also consisting of an alternation of layers of GaAs and layers of AIGaAs; and
    - A contact area 260 (optional), here consisting of a thin layer of gallium arsenide (GaAs) doped, with a second type of doping, P or N, of the type opposite to the first type of doping.
    The laser diode 200 does not have a region enriched locally in protons by ion implantation, nor a confining layer oxidized laterally.
    A quantum well designates in particular a heterostructure made of semiconductor material. The dimension of the heterostructure in one of the directions of space is a few tens of nanometers. The 240 quantum well (s) area, or active area, allows the generation of photons under the effect of electrical excitation, at a wavelength between 600 nm and 1300 nm (depending on the composition, the thickness and quantity of the quantum wells). In operation, the photons generated in the quantum well (s) area 240 are reflected by the lower and upper Bragg mirrors, until the laser effect is obtained. The light emission takes place along an axis orthogonal to the plane of the substrate 210.
    The lower Bragg mirror 230 has a higher reflectivity than the upper Bragg mirror 250, at the emission wavelength of the zone with quantum well (s) 240. For example, a reflection rate of the mirror of lower Bragg 230 is greater than 99%, and a reflection rate of the upper Bragg mirror 250 is between 90% and 98%, at an emission wavelength of the zone with quantum well (s) ) 240. In operation, a laser beam J 7 emerges from the laser diode 200, on the side of the quantum well (s) area 240 opposite the substrate, passing through the upper Bragg mirror 250. The reflectivity of each Bragg mirrors is a function of the number of AIGaAs / GaAs bilayers. Thus, the lower mirror will have a large number of bilayers (high reflectivity) and the upper mirror will have less (low reflectivity), so that the photons can exit from the top.
    The elements of the laser diode 200 listed above are distributed in two superimposed elementary stacks:
    - a first stack, 200A, comprising here the buffer zone 220, the lower Bragg mirror 230 and the zone with quantum well (s) 240; and
    a second stack, 200B, here comprising the upper Bragg mirror 250 and the contact area 260.
    The first stack, 200A, has the shape of a straight cylinder, of generator parallel to (Oz) and of section S A parallel to the plane (xOy). Section S A has a width preferably, but not limited to, between 6 μιτι and 8 μιτι. It is for example, but not limited to, a disc with a diameter between 6 μιτι and 8 μιτι or a side square between 6 μιτι and 8 μιτι.
    The second stack, 200B, has the shape of a straight cylinder, of generator parallel to (Oz) and of section S B parallel to the plane (xOy).
    According to the invention, the area of section S A is less than the area of section S B. The difference between the area of section S B and the area of section S A is for example greater than or equal to 10%, 25% and even even 40% of the area of section S B.
    In a particular case, the sections S A and S B each have a shape of disc of different diameters. In another particular case, the sections S A and S B each have a square shape, each having a side with a different value.
    A central axis of the first stack 200A, parallel to (Oz), coincides with a central axis of the second stack 200B, parallel to (Oz). The first and second stacks 200A, 200B together form a structure having a T-shaped section in a plane parallel to the axis (Oz).
    The lower Bragg mirror 230, belonging to the first stack 200A, therefore has a smaller section than that of the upper Bragg mirror 250, belonging to the second stack 200B. In operation, charge carriers are confined to the center of the laser diode 200, thanks to the reduced section of the lower Bragg mirror 230.
    Here, the laser diode 200 also includes a so-called peripheral region 270, made of a confinement material. The peripheral region 270 extends between the substrate 210 and the second stack 200B, surrounding the first stack 200A. It has the shape of a straight cylinder, of generator parallel to (Oz), and of open section in the center to allow the first stack 200A to pass. Here, the peripheral region 270 projects laterally relative to the second stack 200B, in planes parallel to the plane (xOy).
    The peripheral region 270 consists of a solid material called containment material. It can be a dielectric (for example SiN, S1O2, SiOx, or a combination of these materials), a polymer (for example benzocyclobutene), an undoped semiconductor (for example a semi -conductor says lll-V composed of one or more elements of column III and column V of the periodic table of Mendeleev), or even of a metal oxide (AI2O3 for example). In any event, the material of the peripheral region 270 pushes the charge carriers towards the center of the laser diode.
    Preferably, the peripheral region 270 is made of electrically insulating or non-doped semiconductor material, and extends in direct physical contact with the side walls of the first stack 200A.
    As a variant, the peripheral region 270 is made of electrically conductive material (metal oxide), and it is separated from the side walls of the first stack 200A by a sheath of electrically insulating material (for example a dielectric such as SiN, S1O2, SiOx , or a combination of these materials; a polymer; or benzocyclobutene).
    The laser diode according to the invention thus has an architecture of the “Semi Insulating Buried Heterostructure” type, that is to say with buried semiconductor heterostructure, buried here in the peripheral region 270.
    In FIG. 2, there is also shown:
    - an upper metal electrode 280B of the laser diode, open in the center to allow the laser beam T 7 to pass ; and
    - a lower metal electrode 280A.
    The lower metal electrode 280A extends here on the substrate 210, surrounding the peripheral region 270.
    Depending on whether the substrate 210 is electrically conductive or electrically insulating, the lower metal electrode 280A can extend:
    - on the side of the substrate 210 opposite the first stack 200A;
    - On the same side of the substrate 210 as the first stack 200A, partially or entirely surrounding the peripheral region 270; or
    - On the same side as the substrate 210, and extending as far as the first stack 200A.
    The upper metal electrode 280B here extends both on an upper face of the second stack 200B, on the side opposite to the substrate 210, and on the side walls of said second stack 200B.
    Preferably, at least half of the total surface of the upper metal electrode 280B extends over the side walls of the second stack 200B. Where appropriate, the upper metal electrode 280B can extend entirely over the side walls of the second stack 200B.
    This arrangement of the upper metal electrode 280B, at least in part on the side walls of the second stack 200B, has many advantages:
    - the upper Bragg mirror is protected laterally;
    - The total area of the upper metal electrode is increased, which improves the injection of an excitation current into the laser diode;
    - We can reduce a minimum section of the second stack 200B, and therefore reduce the lateral dimensions of the laser diode;
    - It is possible to relax the constraints in dimensioning, and in positioning of the upper metal electrode, while guaranteeing a passage sufficient to allow the laser beam emitted by the laser diode to pass.
    The production of the upper metal electrode 280B at least in part on the side walls of the second stack 200B is facilitated here by the fact that the peripheral region 270 projects laterally relative to the first stack 200A. The peripheral region 270 thus forms a border to delimit the extent of the upper metal electrode 280B, and to ensure that it does not exceed up to the level of the zone with quantum well (s).
    In the embodiment of Figure 2, the upper metal electrode 280B extends over all of the side walls of the second stack 200B. As a variant, it may extend over only part of them, for example over at least 20% of their surface.
    According to another variant, not shown, the upper metal electrode extends only over an upper face of the second stack 200B. This variant is more particularly adapted to a large laser diode.
    FIG. 3 illustrates a second embodiment of a laser diode 300, which is described only for its differences relative to the embodiment of FIG. 2.
    Here, the quantum well (s) area 340 belongs to the second stack 300B, and not to the first stack 300A. In other words, the quantum well (s) area 340 has the same section as the upper Bragg mirror 350, and not the same section as the lower Bragg mirror 330.
    In this embodiment, but not limited to, the upper metal electrode 380B extends only on an upper face of the second stack 300B.
    FIG. 4 illustrates a third embodiment of a laser diode 400, which is only described for its differences relative to the embodiment of FIG. 2
    Here, the peripheral region 470 does not project laterally relative to the second stack 400B. The peripheral region 470 and the first stack 400A together form a lower right cylinder, of the same section as that of an upper right cylinder defining the shape of the second stack 400B. The generator of the upper right cylinder is confused with that of the lower right cylinder.
    In this embodiment, but not limited to, the upper metal electrode 480B extends only on an upper face of the second stack 400B.
    Examples of methods for manufacturing a laser diode according to the invention are described below. By way of illustration, but without limitation, the case of the manufacture of a laser diode as illustrated in FIG. 2 has been illustrated.
    Each of these embodiments have in common to understand:
    - A first etching step, in which an initial series of layers is etched comprising, at least, a first set of elementary layers, optically reflecting, so as to form the first stack comprising at least the lower Bragg mirror; and
    - A second etching step, in which a second series of layers is etched comprising, at least, a second set of elementary layers, optically reflecting, so as to form the second stack comprising at least the upper Bragg mirror.
    A set of elementary layers known as quantum well (s) is etched during the first or second etching step, to form the quantum well (s) area.
    The method of FIG. 5 comprises the following steps, implemented in this order:
    Step 501:
    First epitaxy on a first substrate 510, to form a first series of layers 50A comprising:
    a buffer layer 52, of the same kind as the buffer zone described with reference to FIG. 2;
    a first set 53 of elementary layers, optically reflecting, of the same kind as the lower Bragg mirror described with reference to FIG. 2;
    a set 54 of elementary layers said to be of quantum well (s), of the same kind as the area of quantum well (s) described with reference to FIG. 2; and a first waiting layer 59A, constituted here by a thin layer of doped GaAs (here doping of the type opposite to that of the buffer layer 52), located on the side opposite to the first substrate 510.
    The first substrate 510 here corresponds to the substrate described with reference to FIG. 2, also called the host substrate.
    Step 502:
    First etching, during which the first series of layers 50A is engraved over its entire thickness, up to the first substrate 510, so as to form a first stack 500A. The first stack 500A comprises the buffer zone 520, the lower Bragg mirror 530, and the zone with quantum well (s) 540 of a laser diode according to the invention, as well as a first waiting zone 590 formed in the first holding layer 59A.
    The first etching is, for example, plasma assisted etching of the reactive ion etching type (RIE for “Reactive-lon Etching”), or plasma etched by induction (ICP for “Inductively Coupled Plasma”), or RIE / ICP. As a variant, the etching is of the ion beam ion etching type (IBE for “Ion Beam Etching”, or CAIBE for “Chemically Assisted Ion Beam Etching”, or RIBE for “Reactive Ion Beam Etching”). The first engraving uses a first mask 5020, to protect the areas not to be engraved. The first mask 5020 can be a dielectric (SiN, SiOx, etc.) or a metal, or a photosensitive resin, etc.
    Step 503:
    Resumption of epitaxy on the first substrate 510 and around the first stack 500A, in order to grow a lateral encapsulation layer 57 of the same nature as the peripheral region described with reference to FIG. 2. Preferably, the lateral encapsulation layer 57 consists of an undoped semiconductor, in particular a lll-V mesh tuning material compatible with the substrate 510.
    Resumption of epitaxy is then followed by removal of the first mask 5020, by dry etching or wet etching.
    Step 503 forms a step called lateral encapsulation of the first stack 500A. Its objective is to planarize the topography of a structure covering the first substrate 510. An upper face of the first stack 500A, on the side opposite to the first substrate 510, remains free, not covered by the material of the lateral encapsulation layer 57 .
    At the end of step 503, the first substrate 510 is covered by a first structure 50A ′, planar, comprising the first stack 500A and the lateral encapsulation layer 57.
    Step 504:
    New epitaxy, to form, on the first structure, 50A ', a second series of layers 50B comprising here:
    a second waiting layer 59B, constituted here by a thin layer of doped GaAs (of the same type of doping as the first waiting layer 59A);
    a second set 55 of elementary layers, optically reflecting, of the same nature as the upper Bragg mirror described with reference to FIG. 2; and a contact layer 56, of the same kind as the contact zone described with reference to FIG. 2, in direct physical contact with the first waiting zone 590.
    Step 505:
    Second etching, during which the second series of layers 50B is etched over its entire thickness, up to the first structure 50A ', so as to form a second stack 500B here comprising a second waiting zone 590B formed in the second waiting layer 59B, the upper Bragg mirror 550 and the contact area 560.
    The second etching can use the same etching techniques as the first etching. It can be carried out under vacuum, using chlorinated gases of the BCh, Cb, S1CI4 type or carbonaceous gas mixtures of the CH4 / H2 type. The addition of a neutral gas can improve etching (Ar, N 2 , etc.). It is also possible to use chemical etching, for example with hydrogen bromide. The second etching uses a second mask, not shown, to protect the areas not to be etched. The second mask can be a dielectric (SiN, SiOx, etc.) or a metal, or a photosensitive material.
    After the second etching, or jointly, etchings are engraved in the lateral encapsulation layer 57 to delimit the peripheral region of the diode, in the lateral encapsulation layer 57. This etching can be an RIE plasma etching and / or ICP using fluorinated gases (CHF3, SF3, CF4, etc.) alone or mixed with inert gases, plasma etching of ions (IBE, RIBE, CAIBE), etc. It uses an engraving mask that can be removed, or kept after having engraved it in the center.
    Next, upper and lower electrodes are produced as illustrated in FIGS. 2 to 4. The material of the electrodes is deposited by physical vapor deposition (or PVD for “physical vapor deposition”). The geometry of each electrode can be defined by etching (lift off, or etching by electron beam for example). The upper electrode may extend in whole or in part on side walls of the second stack, as detailed with reference to FIG. 2.
    FIG. 6 illustrates a second embodiment, which includes the following steps, implemented in this order:
    Step 601:
    First epitaxy, to form a first series of layers 60A on a first substrate 610 as described with reference to FIG. 5 in connection with step 501. The first substrate 610 corresponds here to the substrate described with reference to FIG. 2, also named host substrate.
    Step 602:
    First etching, identical to etching 502 in FIG. 5, during which the first series of layers 60A is etched over its entire thickness, up to the first substrate 610, so as to form a first stack 600A. The first engraving uses a first mask 6020, to protect the areas not to be engraved.
    Step 603:
    Lateral encapsulation of the first stack 600A comprising the lower Bragg mirror 630. At the end of step 603, the first substrate 610 is covered by a first structure 60A ', planar, as described with reference to FIG. 5 in connection from step 503.
    Here, the lateral encapsulation is implemented by depositing an encapsulation layer 671 above the first substrate 610 and planarization.
    The encapsulation layer 671 surrounds and covers the assembly formed by the first stack 600A and the first mask 6020. It consists of a material called confinement, for example a dielectric material (SiN, S1O2, SiOx, combination of these materials, etc.) or a polymeric material (benzocyclobutene for example), or a metal oxide (AI2O3 for example). When the encapsulation layer 671 is made of metal oxide, a sheath is made of electrically insulating material, as described with reference to FIG. 2, before deposition of the encapsulation layer 671.
    The planarization is implemented by chemical mechanical polishing. It also makes it possible to remove the first etching mask 6020. At the end of the planarization, what remains of the encapsulation layer 671 forms a layer called lateral encapsulation layer 67.
    Step 604:
    Second epitaxy, on a second substrate 610 ′, to form a second series of layers 60B as described with reference to FIG. 5 in connection with step 504. The second substrate 610 ′ and the second series of layers 60B together form a second structure 60B '.
    Step 604 can be implemented all or part in parallel of steps 601 to 603, which makes it possible to increase a speed of manufacture of a laser diode according to the invention.
    Step 605:
    Transfer of the second structure 60B 'to the first structure 60A', by direct bonding. During bonding, a first waiting zone 690A of the first structure, located on the side opposite to the first substrate 610, and a second waiting layer 69B of the second structure, located on the side opposite to the second substrate 610 ', are located in direct physical contact with each other.
    The second substrate 610 ′ is then removed, for example by chemical etching, mechanical polishing, mechanical-chemical polishing, and / or epitaxial lift off etching.
    Step 606:
    Second etching, during which the second series of layers 60B is etched over its entire thickness, up to the first structure 60A ', so as to form a second stack 600B, as described with reference to step 505 of the figure 5. This second etching is carried out after removal of the second substrate 610 '.
    As detailed with reference to FIG. 5, a step of etching trenches in the lateral encapsulation layer 67 is implemented jointly or after the second etching.
    Here, the trench etching can be an RIE and / or ICP plasma etching as described above, or a wet or dry etching (etching of a dielectric by wet etching with hydrofluoric acid or using '' a buffered etching oxide solution, etching of a polymer by wet etching with trichlorethylene, etching of a metal by dry or wet etching).
    Next, upper and lower electrodes are produced, as detailed above.
    The methods of Figures 5 and 6 can be combined. For example, in the method of FIG. 5, step 504 can be replaced by steps 604 and 605 of the method of FIG. 6.
    In the methods of FIGS. 5 and 6, the laser diode is formed by two distinct epitaxies, each carrying one or more electrical and / or optical functions. A third epitaxy can be implemented to achieve lateral encapsulation of the first stack. FIG. 7 illustrates a third embodiment, implementing a single epitaxy. This process includes the following steps, implemented in this order:
    Step 701:
    Epitaxy, on a first substrate 710 ', of a stack of layers comprising here, in this order starting from the first substrate 710':
    a contact layer 76, of the same kind as the contact zone described with reference to FIG. 2, a second set 75 of elementary layers, optically reflecting, of the same kind as the upper Bragg mirror described with reference to FIG. 2; and a set 74 of elementary layers said to be of quantum well (s) 74, of the same nature as the area of quantum well (s) described with reference to FIG. 2;
    a second set 73 of elementary layers, optically reflecting, of the same nature as the lower Bragg mirror described with reference to FIG. 2; and a buffer layer 72, of the same kind as the buffer zone described with reference to FIG. 2.
    The first substrate 710 ′ corresponds to an intermediate substrate, distinct from the substrate on which the diode will ultimately rest.
    Step 702:
    First engraving, during which the stack is engraved on only part of its thickness. Here, a first series of layers 70A is etched, consisting of the set 74 with quantum well (s) 74, of the first set 73 of elementary layers, and of the buffer layer 72. A first stack 700A is thus formed. here comprising the buffer zone 720, the lower Bragg mirror 730 and the quantum well (s) zone 740 of a laser diode according to the invention. The first stack 700A here extends over a second series of layers 70B here consisting of the second set 75 of elementary layers and of the contact layer 76.
    The first etching uses one of the etching techniques listed with reference to FIG. 5, step 502. It uses a first mask 7020, to protect the areas not to be etched.
    Step 703:
    Lateral encapsulation of the first stack 700A, as described with reference to FIG. 6, step 603, or with reference to FIG. 5, step 503.
    At the end of this step, there is obtained, on the first substrate 710, a so-called inverted planar structure 70 ′ in which one face of the first stack 700A is flush with the surface of the lateral encapsulation layer 77, on the side opposite to the first substrate 710 '.
    Step 704:
    Transfer, on a second substrate 710, of the assembly formed by the first substrate 710 'and the inverted structure 70', and withdrawal of the first substrate 710 '. During transfer, the assembly formed by the first substrate 710 'and the inverted structure 70' is turned over, so that the first substrate 710 'is on the side opposite to the second substrate 710.
    The second substrate 710 here corresponds to the substrate described with reference to FIG. 2, also called the host substrate, on which the diode will ultimately rest.
    Step 705:
    Second etching, during which the inverted structure 70 ′ is etched on the second substrate 710, over only part of its thickness. This second etching is carried out after removal of the first substrate 710 '. Here, the second series of layers 70B is etched, consisting of the contact layer 76 and the second set 75 of elementary layers. The second etching is stopped at the interface with the lateral encapsulation layer 77. In the second series of layers 70B, it produces a second stack 700B. It implements techniques as described with reference to step 505 in FIG. 5 or step 606 in FIG. 6.
    As detailed with reference to FIG. 5, a step of etching trenches in the lateral encapsulation layer 77 is implemented jointly or after the second etching.
    Next, upper and lower electrodes are produced, as detailed above.
    The transfer step is implemented before the second etching and before the electrodes are produced, so that it involves only entirely flat structures and does not require any particular alignment. After the transfer, no sacrificial layer extends between the second substrate 710 and the inverted structure 70 '. The laser diodes are intended to remain on the second substrate 170. In particular, they are not transferred to a third substrate, by a “pick and place” type process.
    The invention is not limited to the examples of process and devices described above. For example :
    the buffer zone can be doped N and the contact zone doped P, or vice versa;
    the substrate of the laser diode can be a so-called III-V substrate (composed of one or more elements from column III and from column V of the Mendeleev periodic table), or a silicon substrate (isolated silicon layer, or silicon layer belonging to a stack of silicon on insulator type, etc.), or any other suitable substrate. The silicon used can be treated in order to give it the usual electrical functions of CMO type microelectronics. ;
    the lower and upper Bragg mirrors as well as the quantum well (s) zone (s) can be formed from a material based on GaN (gallium nitride) (VCSEL GaN), or any other suitable semiconductor material.
    Preferably, a plurality of laser diodes are produced jointly on the same substrate, or wafer. Engraving trenches to delimit the peripheral region of each diode can isolate the diodes from each other.
    The invention also covers a light emitting device called “RC-LED” (for “Resonant Cavity-Light Emitting Diode”), which differs from a laser diode of the VCSEL type in that it does not have the upper Bragg mirror . In this case, the second stack as described in the text is devoid of a higher Bragg mirror. It preferably includes an N or P-doped contact area, as described in the text. Advantageously, it also includes an active photon emission zone, such as the quantum multi-well zone described in the text.
    The invention is applicable in particular in the field of telecommunications by optical fibers, and in the field of remote sensing (three-dimensional imaging, LIDAR system mounted on a motor vehicle, etc.).
    权利要求:
    Claims (10)
    [1" id="c-fr-0001]
    1. Laser diode (200; 300; 400) comprising, superimposed above a substrate (210; 510; 610; 710), along an axis orthogonal to the plane of said substrate:
    a lower Bragg mirror (230; 330; 530; 730), a quantum well (s) area (240; 340; 540; 740), and an upper Bragg mirror (250; 350; 550), with the lower Bragg mirror (230; 330; 530; 730) located between the substrate and the area with quantum well (s), characterized in that:
    a section (S A ) of the lower Bragg mirror has an area smaller than that of a section (S B ) of the upper Bragg mirror, said sections being defined in planes parallel to the plane of the substrate; and the laser diode (200; 300; 400) comprises a so-called peripheral region (270), made of a so-called confinement material, situated between the substrate and the upper Bragg mirror, and surrounding the lower Bragg mirror (230; 330; 530; 730) at least.
    [2" id="c-fr-0002]
    2. Laser diode (200; 300; 400) according to claim 1, characterized in that it comprises at least one upper electrode (280B), which extends in whole or in part on side walls of the upper Bragg mirror (250; 350; 550).
    [3" id="c-fr-0003]
    3. Method for manufacturing a laser diode (200; 300; 400) according to claim 1 or 2, characterized in that it comprises:
    a first etching step (502; 602; 702), in which a first series of layers (50A; 60A; 70A) is etched, comprising, at least, a first set (53; 73) of elementary layers optically reflecting, so forming a first stack (200A; 300A; 500A; 600A; 700A) comprising at least the lower Bragg mirror;
    a second etching step (505; 606; 705), in which a second series of layers (50B; 60B; 70B) is etched, comprising, at least, a second set (55; 75) of elementary layers optically reflecting, so forming a second stack (200B; 300B; 400B; 500B; 600B; 700B) comprising at least the upper Bragg mirror; and a step (503; 603; 703) of lateral encapsulation of the first stack (200A; 300A; 600A; 700A), implemented after the first etching step;
    a section (S A ) of the first stack having an area smaller than that of a section (S B ) of the second stack, and the second etching step (505; 606; 705) being implemented after the first etching step (502; 602; 702).
    [4" id="c-fr-0004]
    4. Method according to claim 3, characterized in that it comprises the following steps:
    a first epitaxy (601), on a first substrate (610), to form the first series of layers (60A);
    the first etching step (602), to form the first stack (600A) comprising at least the lower Bragg mirror;
    the lateral encapsulation step (603), at the end of which a first structure (60A ′), plane, is obtained on the first substrate (610);
    a second epitaxy (604), on a second substrate (610 ') distinct from the first substrate, to form the second series of layers (60B), the second series of layers (60B) and the second substrate together forming a second structure (60B ');
    a transfer (605) of the second structure (60B ') on the first structure (60A'), followed by a withdrawal of the second substrate (610 '); and the second etching step (606), implemented after the transfer step (605), to form the second stack (600B) comprising at least the upper Bragg mirror.
    [5" id="c-fr-0005]
    5. Method according to claim 4, characterized in that the first epitaxy (601) and the second epitaxy (604) are implemented at least partially simultaneously.
    [6" id="c-fr-0006]
    6. Method according to claim 3, characterized in that it comprises the following steps:
    a first epitaxy (501), on a first substrate (510), to form the first series of layers (50A);
    the first etching step (502), to form the first stack (500A) comprising at least the lower Bragg mirror;
    the lateral encapsulation step (503), at the end of which a first, flat structure (50A ′) is obtained on the first substrate (510);
    a new epitaxy (504), on the first structure (50A '), to form the second series of layers (50B); and the second etching step (505), implemented after the new epitaxy (504), to form the second stack (500B) comprising at least the upper Bragg mirror.
    [7" id="c-fr-0007]
    7. Method according to claim 3, characterized in that it comprises the following steps:
    an epitaxy (701), on a first substrate (710 '), to form a series of layers comprising the second series of layers (70B) and the first series of layers (70A);
    the first etching step (702), to form the first stack (700A) comprising at least the lower Bragg mirror;
    the lateral encapsulation step (703), at the end of which a so-called inverted planar structure (70 ') is obtained on the first substrate (710');
    a transfer (703), on a second substrate (710), of the assembly formed by the first substrate and the inverted structure, followed by a withdrawal of the first substrate (710 '); and the second etching step (705), implemented after the transfer step (703), to form the second stack (700B) comprising at least the upper Bragg mirror.
    [8" id="c-fr-0008]
    8. Method according to any one of claims 3 to 7, characterized in that the step (603; 703) of lateral encapsulation of the first stack (200A; 300A; 600A; 700A) comprises sub-steps for depositing 'an encapsulation layer (671) and planarization.
    [9" id="c-fr-0009]
    9. Method according to any one of claims 3 to 7, characterized in that the step (503; 703) of lateral encapsulation of the first stack (200A; 300A; 500A; 700A) comprises a step of growing a containment material.
    [10" id="c-fr-0010]
    10. Method according to any one of claims 3 to 9, characterized in that it comprises a step of producing an upper electrode, implemented after the second etching step (505; 606; 705), and of so that said upper electrode extends in whole or in part on side walls of the first stack (200A; 300A; 500A; 600A; 700A).
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    同族专利:
    公开号 | 公开日
    EP3547471A1|2019-10-02|
    US20190305518A1|2019-10-03|
    FR3079681B1|2021-09-17|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US6449300B1|1999-03-05|2002-09-10|Tokyo Institute Of Technology|Surface-emitting laser|
    WO2013016676A2|2011-07-27|2013-01-31|MYTEK, LLC |Method and apparatus including improved vertical-cavity surface-emitting lasers|
    WO2015121665A1|2014-02-13|2015-08-20|Mled Limited|Semiconductor modification process and structures|
    US5253262A|1990-10-31|1993-10-12|Kabushiki Kaisha Toshiba|Semiconductor laser device with multi-directional reflector arranged therein|
    JPH0738196A|1993-07-22|1995-02-07|Nec Corp|Surface light emitting element|
    US5621750A|1994-01-20|1997-04-15|Seiko Epson Corporation|Surface emission type semiconductor laser, method and apparatus for producing the same|
    US6046465A|1998-04-17|2000-04-04|Hewlett-Packard Company|Buried reflectors for light emitters in epitaxial material and method for producing same|CN111509560A|2020-04-22|2020-08-07|欧菲微电子技术有限公司|Vertical cavity surface emitting laser, preparation method and camera module|
    CN111525394B|2020-04-27|2021-07-13|江西欧迈斯微电子有限公司|Vertical cavity surface emitting laser, preparation method and camera module|
    CN111555114A|2020-05-11|2020-08-18|欧菲微电子技术有限公司|Vertical cavity surface emitting laser, preparation method and camera module|
    法律状态:
    2019-03-29| PLFP| Fee payment|Year of fee payment: 2 |
    2019-10-04| PLSC| Publication of the preliminary search report|Effective date: 20191004 |
    2020-03-31| PLFP| Fee payment|Year of fee payment: 3 |
    2021-03-30| PLFP| Fee payment|Year of fee payment: 4 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1852737|2018-03-29|
    FR1852737A|FR3079681B1|2018-03-29|2018-03-29|VCSEL TYPE LASER DIODE WITH CONTAINER CONTAINER AND ITS MANUFACTURING PROCESS.|FR1852737A| FR3079681B1|2018-03-29|2018-03-29|VCSEL TYPE LASER DIODE WITH CONTAINER CONTAINER AND ITS MANUFACTURING PROCESS.|
    US16/364,241| US20190305518A1|2018-03-29|2019-03-26|Vcsel laser diode having a carrier confinement layer and method of fabrication of the same|
    EP19165734.5A| EP3547471A1|2018-03-29|2019-03-28|Vcsel type laser diode with carrier confinement and method for manufacturing same|
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