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    • 专利摘要:
    A method of communication between a master device (MT) and N slave devices (ES1-ESN) consecutively connected one-to-one on a data bus (SPI +), the bus comprising a clock line (SCK), a line of mode selection (SS), a selection channel (MOSIs, MISOs) in series, and a transmission channel (MOSIp, MISOp) in parallel, the method comprising: - a selection step (614, 618) implemented by the master device (MT) and the N slave devices (ES1-ESN) on the selection channel (MOSIs, MISOs), comprising a selection of a slave device selected among the N slave devices (ES1-ESN); and a transmission step (620, 622, 714, 716) implemented on the transmission channel (MOSIp, MISOp), comprising a data transmission between the master device (MT) and the selected slave device.
    公开号:FR3068797A1
    申请号:FR1756292
    申请日:2017-07-04
    公开日:2019-01-11
    发明作者:Thierry Biniguer
    申请人:STMicroelectronics Grand Ouest SAS；
    IPC主号:
    专利说明:

    Communication method between a master device and N slave devices connected on a synchronous data bus of the SPI type and corresponding device.
    Embodiments and implementation of the invention relate to synchronous data buses, in particular data buses of the Serial Peripheral Interface (SPI) type in English.
    On a SPI bus, the circuits communicate according to a master-slave diagram where the master controls communication, traditionally in duplex (or "full-duplex" according to the usual English term, that is to say a communication mode in which communication takes place simultaneously in both directions).
    There is also half-duplex (or "half-duplex") mode, in which a single bidirectional line allows exchange between the master and a slave, alternately over time.
    Figures IA and IB show the two most common types of mounting of an SPI bus.
    The master peripheral (or device) M generates a clock signal on a clock line SCK and selects the slave peripheral (or device) with which it wants to communicate by the use of a slave selection signal on a SS slave selection line, and the slave responds to requests from the master.
    At each clock stroke, the master and the slave exchange a bit via the master output channel - slave input MOSI ("Master Output - Slave Input" in English) and the master input channel - slave output MISO ("Master Input - Slave Output" in English). After eight clock strokes, the master transmitted a byte to the slave and vice versa. The frequency of the clock signal is adjusted according to device-specific characteristics.
    FIG. 1A represents a configuration of a master device M and of n slave devices El, E2, En on a serial SPI bus, in which the peripherals are all connected “in daisy chain”, one after the other.
    In this serial configuration, the SPI bus has 4 wires regardless of the number of peripherals, but nevertheless has many drawbacks. For example, the data received during the first clock pulses must be transmitted to other slaves during the other clock pulses to finally reach the last slave.
    Slave devices that are not selected must therefore still be active during communication, and an isolated failure of a slave device interrupts the entire chain.
    The slave devices behave throughout the chain like a shift register, and execute a command contained in the last data received on the order of the SS slave selection signal.
    In addition, the frequency of the clock signal generated by the master is fixed and is limited by the speed of the slowest slave on the bus.
    FIG. 1B represents a configuration of a master device M and of n slave devices El, E2, En on a SPI bus in parallel, in which the MOSI output-input and MISO output channels are connected in parallel to all the ElEn slave devices.
    In this parallel configuration, each slave can be selected via a slave selection line SS1, SS2, SSn which is dedicated to it respectively.
    This configuration has the advantage that the clock signal frequency can be optimized for each ES1ESn slave device, and that the slaves which are not selected can remain inactive.
    However, at least one pin of the master device MT is dedicated to each slave device ESl-ESn, which can be problematic in the electrical diagram. For example, addressing 32 slaves would require 32 pins, which is not physically reasonable.
    In addition, whether in serial or parallel configuration, the assembly is static and the chain cannot be enlarged dynamically during a communication.
    Consequently, it is desirable to improve the performance of data buses of the SPI serial peripheral interface type.
    In this regard, there is proposed in one aspect a method of communication between a master device and N slave devices connected on a synchronous data bus comprising a selection channel to which the master device and the N slave devices are connected in series, and a transmission channel on which the master device and the N slave devices are connected in parallel, the method comprising:
    a selection step implemented by the master device and the N slave devices on the selection channel, comprising a selection of a slave device selected from the N slave devices; and a transmission step implemented on the transmission channel, comprising a data transmission between the master device and the selected slave device.
    This process makes it possible to exploit the advantages of the configurations of the series type and of the parallel type without undergoing the disadvantages.
    Advantageously, the synchronous data bus comprises a mode selection line and the selection step comprises:
    a first slave configuration command intended to place the slave devices in a serial mode, transmitted on the mode selection line and coming from the master device;
    communication of slave identification data between the master device and the N slave devices;
    communication of a slave selection command from the master device.
    According to one embodiment, the transmission step comprises a second slave configuration command intended to place the selected slave device in a parallel mode, transmitted on the mode selection line and coming from the master device.
    The communication of a slave selection command may also comprise a communication of an additional command, for example a command to activate an indication lamp or a rest command for a given duration.
    According to an implementation mode, the master device and the N slave devices forming a chain, an end of chain detection phase is implemented during the transmission step, and before the selection step by each slave devices and is implemented before the selection step by the master device, said end of chain detection phase comprising detection of a presence signal on the selection channel representative of a position at the end of the chain or not of said device.
    In other words, the end of chain detection phase is implemented during an initialization step (that is to say before the selection step) and transmission steps, by each of the master and slave devices.
    Advantageously, the end of chain detection phase comprises, for each device, an application of a draw voltage on a first terminal connected to a first side of the selection channel and of a return voltage on a second terminal connected on a second side of the selection channel, a variation in the pulling voltage being representative of the presence of a slave device in the direction of the first side of the channel. In this case, the variation in pulling voltage acts as a presence signal.
    Advantageously, said end of chain detection phase is implemented periodically, so as to detect a connection or disconnection on the fly from a slave device on the bus.
    These implementation modes allow the chain connected to the bus to be dynamically enlarged, and as many devices to be connected as desired without modifying the communication protocol. Furthermore, this method makes it possible, according to advantageous modes of implementation, to add or remove a device on the fly, that is to say when a communication is already in progress on the same bus.
    According to one embodiment, the communication of slave identification data comprises the communication of slave characteristics comprising the maximum clock signal frequency supported by each of the N slave devices.
    Thus, data transmission can be optimized with respect to the slave characteristics corresponding to the selected slave device.
    According to one embodiment, the communication of identification data includes an enumeration of the number of slave devices connected to the bus.
    The various commands, communications and data transmissions can be timed according to a synchronous data communication protocol of the SPI serial peripheral interface protocol type.
    According to another aspect, a system is also proposed comprising a master device and N slave devices connected on a synchronous data bus comprising a selection channel and a transmission channel, the master device and the N slave devices being connected in series on the selection channel and connected in parallel on the transmission channel, and configured for:
    exchanging slave selection data on the selection channel, in order to select from the N slave devices a selected slave device; and transmitting data between the master device and the selected slave device on the transmission channel.
    Advantageously, the synchronous data bus comprises a mode selection line and the master device is configured to generate on the mode selection line a first slave configuration command intended to place the slave devices in a serial mode, at the time exchanging slave selection data, and the slave selection data includes communication of slave identification data by the slave devices, and communication of a slave selection command by the device master.
    Advantageously, the master device is configured to generate on the mode selection line a second slave configuration command intended to place the selected slave device in a parallel mode, when transmitting data with the selected slave device.
    According to one embodiment, the N slave devices and the master device form a chain and each of the devices is configured to detect an end of chain position by performing a detection of a presence signal on the selection channel representative of a position at the end of the chain or not of said device, during the transmission of transmission data and before exchanging the selection data, and the master device is configured to detect an end of chain position by carrying out a detection of a signal presence on the selection channel representative of a position at the end of the chain or not of said device before exchanging selection data.
    Advantageously, each device is configured to, when detecting the presence signal on the selection channel, apply a pulling voltage to a first terminal connected on a first side of the selection channel and a booster voltage to a second terminal connected to a second side of the selection channel, a variation in the pulling voltage during the measurement being representative of the presence of a slave device in the direction of the first side.
    Advantageously, the master device and the N slave devices are configured to detect an end of chain position periodically, so as to detect a connection or disconnection on the fly of a slave device on the bus.
    According to one embodiment, the N slave devices are configured to communicate slave identification data comprising slave characteristics comprising the maximum clock signal frequency supported by each of the N slave devices.
    Advantageously, the master device is configured to optimize said data transmission relative to the slave characteristics corresponding to the selected slave device.
    According to one embodiment, the master device and the slave devices are configured to communicate identification data comprising an enumeration of the number of slave devices connected to the bus.
    According to one embodiment, the synchronous data bus comprises a clock line and the master device is configured to generate on the clock line a clock signal intended to clock the exchanges and data transmissions between the devices connected to the bus.
    Advantageously, the master device and the slave devices are configured to generate the various commands, communications and data transmissions clocked according to a synchronous data communication protocol of the SPI serial peripheral interface protocol type.
    According to one embodiment, the selection channel comprises a first master output line - slave input and a first master input line - slave output, connecting the master device and the N slave devices one by one in a chain, and the transmission channel comprises a second master output line - slave input and a second master input line - slave output, connecting the N slave devices in parallel with the master device.
    Advantageously, the master device and the slave devices comprise a first bus interface of the SPI series peripheral interface type, comprising an elementary clock line terminal, a master output terminal - elementary slave input and a master input terminal - elementary slave output, as well as a second bus interface comprising a first master output terminal - slave input and a first master input terminal - slave output, and a second master output terminal - slave input and a second terminal master input - slave output, the second bus interface further comprising an output-input switch connecting the master output terminal - elementary slave input to either of said first or second master output terminal - slave input and an input-output switch connecting the master slave output elementary terminal to one or the other tre said first or second master input terminal - slave output.
    In addition, a master device and a slave device belonging to or intended to belong to a system as defined above are proposed independently.
    These modes of implementation and embodiment allow communication from a master device with several slave devices, limited to only six wires and making it possible to dynamically change the two types of existing configurations (in parallel or in series) in order to obtain the better performance in communication. In addition, these modes of implementation and embodiment are compatible with connecting or disconnecting "on the fly" from a slave device on the bus during a communication.
    Other advantages and characteristics of the invention will appear on examining the detailed description of embodiments and implementation, in no way limiting, and the appended drawings in which:
    - Figures IA and IB, previously described, represent conventional SPI configurations;
    - Figures 2 to 7 schematically illustrate different embodiments and implementation of the invention.
    FIG. 2 represents an example of assembly of a master device MT and of N slave devices ES1, ES2, ESN connected consecutively one-to-one on an advantageous synchronous data bus SPI +.
    In this example, the SPI + bus conventionally comprises a clock signal line SCK arranged in parallel, intended to convey a clock signal originating from the master device MT.
    An SS mode selection line arranged in parallel is intended to convey a slave configuration control signal in series mode or in parallel mode, originating from the master MT device.
    The SPI + bus has a selection channel, arranged in series, and a transmission channel, arranged in parallel.
    The selection channel includes a master output line MOSIs serial slave input and a master input line - MISOs serial slave output.
    The transmission channel includes a master output line MOSIp parallel slave input and a master input line - MISOp parallel slave output.
    In the following, for the sake of brevity, the terms "master output - slave input" and "master input - slave output" will be designated respectively by the terms "output-input" and "input-output".
    As represented by the solid lines (in bold) in FIG. 3, in the selection channel, the serial output-input line MOSIs of the master device MT is connected to the serial output-input line MOSIs of the first slave device ES1 of chain. The MISOs serial input-output line of the first ES1 slave device is connected to the MOSIs serial output-input line of the second ES2 slave device in the chain. The MISOs serial input-output line of the second ES2 slave device is connected to the MOSIs serial output-input line of the next slave device, and so on until the last ESN slave device.
    The serial input-output line of the last ESn slave device is looped back to the serial input-output line of the master device.
    In this example, the serial input-output line used between the last slave device ESn and the master device MT is the same line as the parallel input-output line MISOp, given, as will appear hereinafter in particular in relationship with Figure 4, that this parallel input-output line MISOp is present in the transmission channel.
    As shown by the solid lines (in bold) in Figure 4, in the transmission channel, the MOSIp parallel output-input line of the master device is connected to all the MOSIp parallel input-output lines of the slave devices, as well as the line MISOp parallel input-output of the master device is connected to all the MISOp parallel input-output lines of the slave devices.
    The selection channel is intended to convey in particular communications for identifying a slave device, and communications for selecting a slave device originating from the master device.
    The transmission channel is intended to convey in particular a data transmission between the master device and a selected slave device, in an optimized manner for the capacities of the selected slave device.
    Thus, each slave device comprises a SPI + bus interface comprising six links intended to be respectively connected to the clock signal line SCK, to the serial input / output line MOSIs, to the serial input / output line MISOs, to the MOSIp parallel output-input line, MISOp parallel input-output line and SS mode selection line.
    Furthermore, each master MT and slave device ES1-ESN advantageously comprises an SPI BLSPI interface block comprising the conventional SPI interface terminals: an elementary clock signal terminal SCK, an elementary output-input terminal MOSI and a terminal MISO elementary input-output.
    The BLSPI SPI interface block is configured to process the data communicated on the MOSI output-input and MISO input-output terminals, clocked according to a usual SPI protocol by the cycles of the SCK clock signal.
    This allows high compatibility of communications for the various devices connected to the SPI + bus.
    Consequently, the SPI + bus interfaces of each slave device comprise on the one hand an output-input switch SWOI intended to couple the first output-input link MOSIs or the second output-input link MOSIp to the output terminal- basic MOSI input of the block; and on the other hand an output switch SWIO intended to couple the first input-output link MISOs or the second input-output link MISOp to an elementary input-output terminal MISO of the block.
    In other words, the SWOI input output and SWIO input-output switches allow the respective device to be placed in a serial or parallel mode.
    Likewise, the SPI + bus interface of the master device includes an output-input switch SWMT intended to couple the first output-input link MOSIs or the second output-input link MOSIp to the elementary output-input terminal MOSI of the BLSPI block.
    These different switches can for example be produced by the so-called "10 alternates" function well known to those skilled in the art and available in current microcontrollers. More precisely, the input-output pins (10) are connected to the peripherals, here the BLSPI block, through a multiplexer. Two input-output pins can thus address the BLSPI block. These two pins connectable to the same block, here the BLSPI block, are chosen from the list of input and output pins from the table available in the datasheet of the microcontroller and providing the combinations between all the pins input output and all peripheral functions.
    Although not shown in FIGS. 2 to 4, the bus interface SPI + of the master device MT can also comprise an input-output switch configured to be able to couple a first MISOs input-output link or a second MISOp input-output link to the basic MISO input-output terminal of the BLSPI block.
    However, this input-output switch is, for a master MT device, always set in the position coupling the second MISOp input-output link to the elementary MISO input-output terminal of the BLSPI block, due to the 'uniqueness, between serial and parallel mode, of the MISOp input-output line of the master MT device.
    This makes it possible to operate an interface of the SPI + bus which is advantageously identical for the master devices or the slave devices.
    In serial mode, the device is connected to the selection channel of the SPI + interface, and in parallel mode, the device is connected to the transmission channel of the SPI + interface.
    The SWOI output-input and SWIO input-output switches are controlled by a control signal from the respective device, for example in particular as a function of the signal communicated on the mode selection line SS.
    In summary, the SPI + bus allows the master device MT to communicate and dynamically select the two possible configurations (or modes) by means of the mode selection signal on the mode selection line SS.
    This SS signal controls each slave in a reconfiguration procedure to act either in a serial mode (for bus control purposes) or in a parallel mode (for data transmission and exchange purposes).
    A single instance of the SPI protocol is used, which is dynamically (re) routed on the transmission channel or the selection channel according to the SS mode selection signal.
    The master output lines - MOSI slave input and master input - MISO slave output of the SPI instance are reconfigured on the fly and become either the first MOSIs and MISOs lines of the selection channel, or the second MOSIp and MISOp lines of the transmission channel.
    If a waiting period is necessary, the master device must wait at least this period, likewise, if a notification signal is necessary, the master device MT must wait for the reception of this signal.
    After activation or reset, the SPI + bus is automatically configured in serial mode.
    When data transmission is required, the SPI + bus is switched and executed in parallel mode.
    In slave devices, a read or write status control register is used and unselected slave devices enter a presence detection procedure, while the selected slave device operates effectively in parallel mode.
    FIG. 5 represents six-pin connectors CX1, CX2 making it possible to connect one-to-one of the devices on a data bus SPI + as described previously in relation to FIGS. 2 to 4.
    For example, the connector CX1 belongs to the SPI + bus interface associated with the first slave device ES1 described previously in relation to FIGS. 2 to 4 and the other connector CX2 belongs to the bus interface SPI + associated with the second slave device ES2 described previously in connection with FIGS. 2 to 4.
    The connectors have a female side F with six sockets 1, 2, 3, 4, 5, 6 and a male side M with six pins 1, 2, 3, 4, 5, 6. A couple of a socket and a pin connected together is designated by the term point, followed by the same reference.
    Points 1 to 4 of each connector CX form the parallel connections of the SPI + bus, i.e. the clock signal line SCK on point 4, the mode selection line SS on point 1, and the transmission channel on points 2 and 3, i.e. the MOSIp output-input line on point 2 and the MISOp input-output line on point 3.
    Point 5 connects the serial input-output line MISOs of the slave device ES1 to the serial output-input line MOSIs of its neighbor ES2.
    Point 6 connects, in this representation, another serial output-input line MOSIs ’of the slave device ES1 to another serial input-output line MISOs’ of its neighbor ES2.
    Said other serial output-input lines MOSIs 'and serial input-output MISOs' are “fictitious” lines forming neither the selection channel nor the transmission channel, but allow a symmetrical connection (that is to say say that adding a slave device to the chain can be done as well by coupling the pins M of the new device into the sockets F of the last device in the chain, or conversely by coupling the sockets F of the new device on pins M of the last device in the chain).
    This CX1-CX2 connector architecture also has the advantage of allowing the same connector to be compatible with both a master device and a slave device, offering advantageous modularity in terms of hardware; and, as detailed below, the advantage of operating a detection on the left (for example in the case where a master becomes a slave) in order to know if the device is in a master configuration.
    Furthermore, FIG. 5 represents a configuration for detecting the presence of a neighboring slave device on the selection channel. In particular, this configuration allows a master or slave device to detect the presence of a slave device connected to its right, in the orientation of FIG. 5, connected on the side of the sockets F.
    For the master device, this verifies that a slave device is connected to start communication on the SPI + bus.
    For a slave device, this determines whether it is the last device connected to the SPI + bus.
    If the (last) slave device (ESN) does not detect the presence of a neighboring slave device, it configures its SPI + bus interface to loop back its elementary input-output line MISO to the master device MT on the input line- MISOp parallel output of the transmission channel.
    The presence detection configuration includes the application of a resistive pull voltage on a terminal connected on one side F of the selection channel, and a firm recall voltage on a terminal connected on another side M of the selection channel.
    If a slave device is connected to the SPI + bus, then the application of the firm booster voltage will vary from the draw voltage, which corresponds to the presence of a neighboring slave device.
    In the example represented by FIG. 5, the resistive pulling voltage is applied to the socket 5, that is to say the serial input line MISOs of the serial channel, by coupling of a voltage source of high level reference VDD via a resistor R. The return voltage is applied to pin 5, i.e. the serial output-input line MOSIs of the serial channel, by direct coupling of a voltage source GND low level reference.
    If two devices are connected to each other, then their socket 5 and pin 5 are connected at a point 5, and the return voltage is firmly applied to this point, which varies, that is to say say drop in this example, the value of the resistive voltage from point 5.
    If no device is connected, then the voltage of socket 5 does not vary, i.e. remains at a high level in this example.
    A measurement of the voltage level on socket 5 thus allows the slave device to detect the presence of a neighboring device.
    Advantageously, this configuration is implemented periodically by the slave devices not being selected, during a slave configuration command in parallel mode.
    This configuration thus makes it possible to detect a connection or disconnection on the fly of a device on the SPI + bus and moreover to know whether the slave device is the last slave device connected to the bus.
    It is therefore possible to connect and disconnect slave devices on the SPI + bus without interrupting processing, the SPI + bus interfaces being able to self-configure according to the devices connected to the SPI + bus.
    The master device is advantageously configured to implement such a detection of the presence of a neighboring slave device on the serial channel, before starting communication on the SPI + bus in serial mode.
    Furthermore, the detection of neighboring device can be implemented on the other side of the six-pin connector, that is to say on the male side M.
    For the master device, this makes it possible to check whether another master is connected, in which case it becomes a slave.
    For a slave device, this allows you to determine if the bus chain is not cut. If cut, this slave device can become a master device.
    The detection of the male side M is implemented according to exactly the same principle as the detection of the female side F, by applying a resistive pulling voltage, for example on the pin 6, and a return voltage, for example on the socket 6 , and by detecting a possible variation in the pulling voltage.
    FIG. 6 represents an exemplary mode of implementation of a communication 600 on the SPI + bus described in relation to FIGS. 2 to 5, from the side of the master device.
    At the start 601 of a communication on the SPI + bus, for example at switching on or following a reset of the master device, the master device is configured 602 in the first duplex mode (serial mode). The master device can, during its configuration in serial mode 602 send a first command to configure the slave device in serial mode on the SS mode selection line.
    For example, in practice the first slave configuration command in serial mode is communicated by a falling edge of the signal present on the SS mode selection line.
    The master device detects 604 if a slave device is connected to the bus, for example as described previously in relation to FIG. 5.
    In other words, an end of chain detection phase is implemented during an initialization step (before the selection step) by the master device. This allows the master device to know if at least one slave is connected to the SPI + bus.
    If so, the master device is placed on standby for slave notification 606 coming from the last slave device connected to the bus (706).
    If not, the master device is placed on standby for connection detection on the fly 608. As long as a connection is not detected, the master device remains on standby for connection detection on the fly 608.
    When a connection is detected, the device waits for notification from slave device 606.
    It is also possible, for the sake of simplification of the communication method on the SPI + bus, that said waiting phase for notification of slave device 606 is implemented by the execution of a fixed pause time, without the need for '' a slave notification by a slave device.
    After receiving the slave notification or the pause time (706) having elapsed, the master device initiates a request 610 for listing the number of connected slave devices.
    The master device must know the total number of slave devices on the bus in order to be able to address all the slaves or one slave independently.
    For example, a write operation containing an echo command on a few bits is sent on the serial channel as many times as necessary until reception of this echo by the master device. The number of echo commands sent is equal to the number of slave devices connected to the SPI + bus.
    Then the master device sends a communication request for the identification data of slave devices 612, still in serial mode.
    For example, the communication of identification data includes the communication of slave characteristics such as the maximum clock signal frequency supported by each of the slave devices, the function of each of the slaves, etc.
    This allows the slave devices to be addressed independently with the appropriate clock speed (in parallel mode) and to set the clock to the lowest supported frequency in the chain (in serial mode).
    For example, the communication of identification data includes a read operation dedicated to each of the listed slave devices (N in number), followed by N white operations to retrieve the results. A positive pulse from the mode selection signal can be used to force processing in each slave device.
    The operations 606, 610 and 612 are included in a general phase of identification of slave devices 614.
    Then, the SPI + bus is considered ready 616, from the point of view of the master device.
    If the master device needs to set up data transmission with one of the bus slaves, it communicates a slave selection signal 618 on the serial channel to the selected slave.
    Otherwise, the master device waits for detection of connection on the fly 608. As long as a connection is not detected, the master device tests whether it needs to implement a data transmission 616 and replaces itself. waiting for connection detection on the fly 608.
    When the selection signal is transmitted to the selected device, the master device is configured in parallel mode and sends a slave device selection command in parallel mode on the mode selection line SS. For example, the slave selection command can be coded on a single bit.
    Then the data transmission 622 in the parallel channel of the bus is implemented in an optimized manner relative to the slave characteristics of the selected slave device, in particular the maximum frequency of the clock signal supported by the selected slave device.
    FIG. 7 represents an exemplary mode of implementation of a communication 700 on the SPI + bus described in relation to FIGS. 2 to 5, on the side of the slave device.
    At the start 701 of a communication on the SPI + bus, for example during an initialization phase such as switching on or resetting the slave device, the slave device is automatically configured in the first duplex mode (serial mode ).
    The slave device then detects 702 if a neighboring slave device is connected to the bus, for example as described previously in relation to FIG. 5.
    If yes, the slave device is configured 708 in "normal" serial mode, the serial input-output line MISOs of this slave device being connected to the serial output-input line MOSIs of the next slave device. Then the normal slave device waits for reception of command 710.
    If not, the slave device is configured 704 in serial "end of chain" mode, the serial input-output line of this slave device being connected to the parallel output-input line MOSIp of the master device.
    The last slave device then notifies 706 the master device of its presence, confirming the looping of the selection channel of the SPI + bus.
    Then, the slave device is placed on standby for receiving command 710.
    When a command from the master device is received, the slave device executes it 712. The command can for example be a request for communication of identification data from slave devices (612), the transmission of an echo command, or a selection of slaves.
    If the slave has received a slave selection and a second slave configuration command in parallel mode is received 714 on the mode selection line, then the slave device is configured in parallel mode and implements a data transmission according to the orders of the master device.
    For example, in practice the second slave configuration command in parallel mode is communicated by a rising edge of the signal present on the SS mode selection line.
    Otherwise (714), the slave device waits for command reception 710.
    If no command is communicated, the slave device waits for detection of connection on the fly 718.
    If a connection is not detected, the slave device waits for detection of connection / disconnection on the fly 608.
    If a connection is not detected, the device waits for command 710 to be received, and so on until a command is received or a slave device is connected / disconnected on the fly.
    If a connection / disconnection on the fly is detected, the device repeats the steps for detecting the end of chain slave device 702 and following.
    Thus, the end of chain detection phase is implemented during an initialization step (that is to say before the selection step) and during the transmission steps, by each of the devices. slaves.
    In summary, the SPI bus + single master / multiple slaves has only six wires regardless of the number of slaves. The SPI + bus makes it possible to dynamically change the two types of existing topology (in parallel or in series) to obtain the best performance in the communication flow, but also flexibility with an additional functionality of connection / disconnection on the fly during an execution .
    Slaves can, for example, have simple button, battery, sensor, motor, modem, fingerprint reader, GPS, display, RF transmission stage functions, which, being linked on the bus, form a more complex and modular system. .
    Furthermore, the invention is not limited to these embodiments but embraces all variants thereof, for example, although it has been described embodiments and implementation adapted to duplex communication ("full- duplex "), the invention is nevertheless compatible with half-duplex communication (" half-
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    duplex ”), in addition, the six-pin connectors described above in connection with FIG. 5 have been given by way of example, as have the points on which the detections of neighboring devices are implemented.
    权利要求:
    Claims (23)
    [1" id="c-fr-0001]
    1. Communication method between a master device (MT) and N slave devices (ES1-ESN) on a synchronous data bus (SPI +) comprising a selection channel (MOSIs, MISOs) to which the master device is connected in series ( MT) and the N slave devices (ES1-ESN), and a transmission channel (MOSIp, MISOp) to which the master device and the N slave devices are connected in parallel, the method comprising:
    a selection step (614, 618) implemented by the master device (MT) and the N slave devices (ES1ESN) on the selection channel (MOSIs, MISOs), comprising a selection of a slave device selected from among the N slave devices (ES1-ESN); and a transmission step (620, 622; 714, 716) implemented on the transmission channel (MOSIp, MISOp), comprising a data transmission between the master device (MT) and the selected slave device.
    [2" id="c-fr-0002]
    2. Method according to claim 1, the synchronous data bus comprising a mode selection line (SS), in which the selection step (614, 618) comprises:
    a first slave configuration command intended to place the slave devices (ES1-ESN) in a serial mode (602; 704, 708) transmitted on the mode selection line (SS) and coming from the master device (MT);
    a slave identification data communication (610, 612; 712) between the master device (MT) and the N slave devices (ES1-ESN);
    a communication of a slave selection command (618) from the master device (MT).
    [3" id="c-fr-0003]
    3. The method of claim 2, wherein the transmitting step (620, 622; 714, 716) comprises a second slave configuration command intended to place the selected slave device in a parallel mode, transmitted on the line of mode selection (SS) and from the master device.
    [4" id="c-fr-0004]
    4. Method according to any one of the preceding claims, the master device (MT) and the N slave devices (ES1-ESN) forming a chain, in which an end of chain detection phase (608; 702, 718) is implemented during the transmission step and before the selection step by each of the slave devices (ES1-ESN) and is implemented before the selection step by the master device (MT), said phase of end of chain detection comprising detection of a presence signal on the selection channel, representative of a position at the end of the chain of said device.
    [5" id="c-fr-0005]
    5. Method according to claim 4, in which the end of chain detection phase (608; 702,718) comprises, for each device, an application of a pulling voltage (VDD, R) to a first terminal (F5 ) connected on a first side (F) of the selection channel (MOSIs, MISOs) and a return voltage (GND) on a second terminal (M5) connected on a second side (M) of the selection channel ( MOSIs, MISOs), a variation in the pulling voltage (VDD) being representative of the presence of a slave device in the direction of the first side (F).
    [6" id="c-fr-0006]
    6. Method according to any one of claims 4 or 5, wherein said end of chain detection phase (608; 702, 718) is implemented periodically, so as to detect a connection or disconnection on the fly d '' a slave device on the bus (SPI +).
    [7" id="c-fr-0007]
    The method according to any of the preceding claims taken in combination with claim 2, wherein the communication of slave identification data (610, 612; 712) comprises the communication of slave characteristics having the maximum frequency clock signal supported by each of the N slave devices (ES1-ESN).
    [8" id="c-fr-0008]
    8. Method according to any one of the preceding claims taken in combination with claim 2, in which the communication of identification data (610, 612; 712) comprises an enumeration (610) of the number (N) of connected slave devices on the bus (SPI +).
    [9" id="c-fr-0009]
    9. Method according to any one of the preceding claims, in which the various commands, communications and data transmissions are timed according to a synchronous data communication protocol of the SPI serial peripheral interface protocol type.
    [10" id="c-fr-0010]
    10. System comprising a master device (MT) and N slave devices (ES1-ESN) connected on a synchronous data bus (SPI +) comprising a selection channel (MOSIs, MISOs) and a transmission channel (MOSIp, MISOp), the master device (MT) and the N slave devices (ES1-ESN) being connected in series on the selection channel (MOSIs, MISOs) and connected in parallel on the transmission channel (MOSIp, MISOp), and configured for:
    exchanging slave selection data (614, 618) on the selection channel (MOSIs, MISOs), in order to select from the N slave devices (ES1-ESN) a selected slave device; and transmitting data (622) between the master device (MT) and the selected slave device on the transmission channel (MOSIp, MISOp).
    [11" id="c-fr-0011]
    The system of claim 10, wherein the synchronous data bus (SPI +) has a mode selection line (SS) and wherein the master device (MT) is configured to generate on the mode selection line (SS ) a first slave configuration command intended to place the slave devices (ES1-ESN) in a serial mode (602; 704, 708), at the time of exchanging slave selection data, and in which the data slave selection devices include communication of slave identification data (612) by the slave devices, and communication of a slave selection command (618) by the master device (MT).
    [12" id="c-fr-0012]
    12. System according to any one of claims 11, in which the master device (MT) is configured to generate on the mode selection line (SS) a second slave configuration command intended to place the selected slave device in a parallel mode (620), when transmitting data (622) with the selected slave device.
    [13" id="c-fr-0013]
    13. System according to any one of claims 10 to 12, in which the N slave devices (ES1-ESN) and the master device (MT) form a chain and each of the slave devices (ES1-ESN) is configured to detect a position at the end of the chain by performing a detection of a presence signal on the selection channel (MOSIs, MISOs), representative of a position at the end of the chain of said device (604, 608; 718), during data transmission transmission (622) and before exchanging the selection data (614, 618), and the master device (MT) is configured to detect a position at the end of the chain by carrying out a detection of a presence signal on the transmission channel selection (MOSIs, MISOs), representative of a position at the end of the chain of said device (604, 608; 718), before exchanging selection data (614, 618).
    [14" id="c-fr-0014]
    14. The system as claimed in claim 13, in which each device (MT, ES1-ESN) is configured to, when detecting a presence signal on the selection channel (MOSIs, MISOs), apply a draw voltage (VDD, R) on a first terminal (F5) connected to a first side (F) of the selection channel (MOSIs, MISOs) and a booster voltage (GND) on a second terminal (M5) connected to a second side (M) of the selection channel (MOSIs, MISOs), a variation in the pulling voltage during the measurement being representative of the presence of a directly adjacent slave device in the direction of the first side.
    [15" id="c-fr-0015]
    15. System according to any one of claims 13 or 14, in which the master device (MT) and the N slave devices (ES1-ESN) are configured to detect a position at the end of the chain periodically, so as to detect a connection or a disconnection on the fly from a slave device on the bus.
    [16" id="c-fr-0016]
    16. System according to any one of claims 10 to 15 taken in combination with claim 11, in which the N slave devices (ES1-ESN) are configured to communicate slave identification data (612) comprising characteristics of a slave comprising the maximum clock signal frequency supported by each of the N slave devices (ES1-ESN).
    [17" id="c-fr-0017]
    17. System according to any one of claims 10 to 16 taken in combination with claim 11, in which the master device (MT) and the slave devices (ES1-ESN) are configured to communicate identification data (612) comprising an enumeration of the number (N) of slave devices connected to the bus (SPI +).
    [18" id="c-fr-0018]
    18. System according to any one of claims 10 to 17, in which the synchronous data bus (SPI +) comprises a clock line (SCK) and the master device (MT) is configured to generate a clock signal on the clock line (SCK), intended to clock the data exchanges and transmissions between the devices (MT, ES1-ESN) connected to the bus (SPI +).
    [19" id="c-fr-0019]
    19. System according to any one of claims 10 to 18, in which the master device (MT) and the slave devices (ES1ESN) are configured to generate the various commands, communications and data transmissions are timed according to a communication protocol of SPI serial device interface protocol type data.
    [20" id="c-fr-0020]
    20. System according to any one of claims 10 to 19, in which the selection channel comprises a first master output line - slave input (MOSIs) and a first master input line - slave output (MISOs), connecting a -one-to-chain the master device (MT) and the N slave devices (ES1-ESN), and the transmission channel includes a second master output line - slave input (MOSIp) and a second master input line - slave output (MOSIp), connecting the N slave devices (ES1ESN) in parallel with the master device (MT).
    [21" id="c-fr-0021]
    21. The system as claimed in claim 20, in which the master device (MT) and the slave devices (ES1-ESN) comprise a first bus interface (BLSPI) of the serial peripheral interface type SPI, comprising a clock line terminal. elementary (SCK), a master output terminal - elementary slave input (MOSI) and a master input terminal - elementary slave output (MISO), as well as a second bus interface comprising a first master output terminal - slave input (MOSIs) and a first master input terminal - slave output (MISOs), and a second master output terminal - slave input (MOSIp) and a second master input terminal - slave output (MOSIp), the second interface of bus further comprising an output-input switch (SWOI) connecting the master output terminal - elementary slave input (MOSI) to either of said first or second master output slave input terminal ( MOSIs, MOSIp) and an input-output switch (SWIO) connecting the master input terminal - elementary slave output (MISO) to one or the other of said first or second master input terminal - slave output ( MISOs, MISOp).
    [22" id="c-fr-0022]
    22. Master device (MT) belonging to or intended to belong to a system according to any one of claims 10 to 21.
    [23" id="c-fr-0023]
    23. Slave device (ES1-ESN) belonging to or intended to belong to a system according to any one of claims 10 to 21.
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    公开号 | 公开日
    US10552366B2|2020-02-04|
    US20200142855A1|2020-05-07|
    CN109213715A|2019-01-15|
    EP3425517A1|2019-01-09|
    FR3068797B1|2019-07-19|
    US20190012291A1|2019-01-10|
    CN208985152U|2019-06-14|
    US10853305B2|2020-12-01|
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    法律状态:
    2019-01-11| PLSC| Search report ready|Effective date: 20190111 |
    2019-06-21| PLFP| Fee payment|Year of fee payment: 3 |
    2021-04-09| ST| Notification of lapse|Effective date: 20210305 |
    优先权:
    申请号 | 申请日 | 专利标题
    FR1756292|2017-07-04|
    FR1756292A|FR3068797B1|2017-07-04|2017-07-04|METHOD OF COMMUNICATION BETWEEN A MASTER DEVICE AND N SLAVES CONNECTED ON A SYNCHRONOUS DATA BUS OF THE SPI TYPE AND CORRESPONDING DEVICE|FR1756292A| FR3068797B1|2017-07-04|2017-07-04|METHOD OF COMMUNICATION BETWEEN A MASTER DEVICE AND N SLAVES CONNECTED ON A SYNCHRONOUS DATA BUS OF THE SPI TYPE AND CORRESPONDING DEVICE|
    EP18178763.1A| EP3425517A1|2017-07-04|2018-06-20|Method for communication between a master device and n slave devices connected to an spi-type synchronous data bus and corresponding device|
    CN201810718529.5A| CN109213715A|2017-07-04|2018-07-03|Communication means and corresponding equipment|
    CN201821043497.5U| CN208985152U|2017-07-04|2018-07-03|Communication system|
    US16/027,062| US10552366B2|2017-07-04|2018-07-03|Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel|
    US16/732,990| US10853305B2|2017-07-04|2020-01-02|Method of communication for master device and slave device on synchronous data bus wherein master and slave devices are coupled in parallel|
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