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    • 专利摘要:
    The invention relates to a method for collectively producing a plurality of optoelectronic chips (P1, P2), comprising the following steps: i) providing a receiving substrate (1), comprising a plurality of so-called elementary zones (z1 , z2), each having at least one so-called coupling waveguide (31, 32) integrated in the receiving substrate (1); ii) carrying a plurality of studs (6) on the elementary zones (z1, z2) so that the studs (6) partially cover the coupling waveguides (31, 32); iii) producing said first optoelectronic components (21, 22) from said pads (6); characterized in that, following the transfer step, each pad (6) extends over a set (E) of at least two adjacent elementary zones (z1, z2).
    公开号:FR3058830A1
    申请号:FR1660967
    申请日:2016-11-14
    公开日:2018-05-18
    发明作者:Sylvie Menezo；Frank Fournel
    申请人:Commissariat a lEnergie Atomique CEA；Commissariat a lEnergie Atomique et aux Energies Alternatives CEA；
    IPC主号:
    专利说明:

    Holder (s): COMMISSIONER FOR ATOMIC ENERGY AND ALTERNATIVE ENERGIES Public establishment.
    Extension request (s)
    Agent (s): INNOVATION COMPETENCE GROUP.
    METHOD FOR THE COLLECTIVE REALIZATION OF A PLURALITY OF OPTOELECTRONIC CHIPS.
    FR 3 058 830 - A1 (5 /) The invention relates to a method for the collective production of a plurality of optoelectronic chips (P1, P2), comprising the following steps:
    i) supply of a reception substrate (1), comprising a plurality of so-called elementary zones (z1, z2), each comprising at least one so-called coupling waveguide (31, 32), integrated in the reception substrate (1);
    ii) transfer of a plurality of pads (6) to the elementary zones (z 1, z2), so that the pads (6) partially cover the coupling waveguides (31,32);
    iii) making said first optoelectronic components (21, 22) from said studs (6);
    characterized in that, following the transfer step, each stud (6) extends over an assembly (E) of at least two adjacent elementary zones (z 1, z2).
    i
    METHOD FOR THE COLLECTIVE REALIZATION OF A PLURALITY OF OPTOELECTRONIC CHIPS
    TECHNICAL FIELD [001] The field of the invention is that of methods for the collective production of a plurality of optoelectronic chips, by a technique of transferring thumbnails onto a functionalized reception substrate.
    STATE OF THE PRIOR ART [002] The production of optoelectronic chips comprising diodes capable of emitting or detecting electromagnetic radiation can be carried out collectively, by a technique for transferring studs made from a semiconductor compound, also called vignettes , on a receiving substrate.
    FIG. 1A schematically illustrates, in top view, an example of optoelectronic chips P produced on a reception substrate 1 of the SOL type. The dotted lines represent cutting lines L of a subsequent step of individualization of the optoelectronic chips P by cutting the receiving substrate 1. The cutting lines L thus delimit elementary zones z of the receiving substrate 1 at the level of which the optoelectronic chips P are produced. Each elementary zone z here comprises active photonic components (diodes, modulators ...) and passive (waveguides, multiplexers ...) optically coupled to each other so as to form a photonic circuit.
    Figure IB illustrates in detail four adjacent optoelectronic chips Pl, P2, P3, P4 shown in fig.lA. The optoelectronic chips P1, P2, P3, P4 are here transmitters each comprising a network of several laser diodes 2 produced on the basis of a semiconductor compound, for example InP, in the form of a stack of semiconductor layers comprising here mainly 1ΊΝΡ, each laser diode being optically coupled to a so-called coupling waveguide (represented here by an arrow starting from the laser diode 2), integrated in the receiving substrate 1, which allows the propagation of the emitted optical mode by the laser diode 2 to a modulator 4 then to a multiplexer 5. Of course, the integrated photonic circuits can be different from those shown in this figure, and can in particular include other photonic components, for example couplers to optical fibers . The optoelectronic chips can also be photodiodes receivers, or transceivers (transceivers, in English) comprising at the same time laser diodes and photodiodes.
    [005] A process for the collective production of optoelectronic chips may include a step of transferring a plurality of studs onto the reception substrate at the level of the various elementary areas. Each pad has a semiconductor portion made from a semiconductor compound, for example a III-V compound, and is then called a III-V label. The semiconductor portion can thus be produced in a stack of several semiconductor layers. The transfer is carried out so that the III-V stickers are deposited in separate elementary zones, so that each III-V sticker covers a so-called coupling part of at least one coupling waveguide of the corresponding zone. . The III-V stickers can in particular be glued to the receiving substrate by molecular adhesion. A step of structuring the III-V stickers is then carried out to produce, by lithography and etching, a plurality of optoelectronic components, such as laser diodes, photodiodes or even electro-absorption modulators, each optoelectronic component being opposite the coupling part of a waveguide, and therefore optically coupled to the latter. The optoelectronic chips are then individualized by cutting the receiving substrate.
    There is however a need to reduce the cost of manufacturing optoelectronic chips without, however, complicating the production process.
    PRESENTATION OF THE INVENTION The aim of the invention is to at least partially remedy the drawbacks of the prior art, and more particularly to propose a process for the collective production of optoelectronic chips which makes it possible to reduce manufacturing costs. For this, the object of the invention is a process for the collective production of a plurality of optoelectronic chips, comprising the following steps:
    supply of a reception substrate, comprising a plurality of so-called elementary zones each intended to delimit an optoelectronic chip, each elementary zone comprising at least one so-called coupling waveguide, integrated in the reception substrate, intended to be optically coupled a first optoelectronic component;
    transfer of a plurality of pads on the elementary areas, so that the pads partially cover the coupling waveguides;
    production of said first optoelectronic components from said studs, so that each first optoelectronic component faces at least one coupling waveguide of the corresponding elementary area.
    According to the invention, following the transfer step, each pad extends over a set of at least two adjacent elementary zones, so as to partially cover at least one coupling waveguide of each of said adjacent elementary areas.
    Some preferred but non-limiting aspects of this process are as follows.
    Thus, during the step of producing the first optoelectronic components, each of the first optoelectronic components produced from the same pad can be located opposite one of the coupling waveguides of the adjacent elementary zones of said same together.
    At least a first optoelectronic component of a first elementary area and at least a second optoelectronic component of a second elementary area adjacent to the first elementary area and belonging to the same assembly, said first and second optoelectronic components being produced at starting from the same pad, can be respectively spaced by an equal distance from a dividing line, forming a border common to said first and second adjacent elementary zones. Said distance may be less than 600pm.
    Said first optoelectronic component and said second optoelectronic component can be spaced apart from one another by a distance of less than 1.2 pm.
    A first optoelectronic component can be located opposite a coupling portion of a first coupling waveguide of a first elementary area of an assembly, and a second optoelectronic component can be located opposite a coupling portion of a second coupling waveguide of a second elementary zone adjacent to the first elementary zone and belonging to the same assembly, the first and second coupling waveguides extending, starting from their respective coupling parts, in parallel.
    Said first and second coupling waveguides can extend, from their respective coupling parts, in directions opposite to each other.
    Said first and second coupling waveguides can extend, from their respective coupling parts, in directions parallel to each other.
    The first coupling waveguide and the second waveguide may extend, from their respective coupling parts, so as to present, one with respect to the other, an axial symmetry with respect to said separation line.
    Each pad can extend over a set of four adjacent elementary zones two by two.
    Each pad may include a semiconductor portion made based on a semiconductor compound, and a growth substrate from which the semiconductor portion is produced by epitaxy.
    The method may include a step of removing the growth substrate, the latter being made of an alloy based on said semiconductor compound.
    Each pad may include a semiconductor portion made from a III-V semiconductor compound.
    The first optoelectronic component can be a laser source, a photodiode or an electro-optical modulator.
    Each elementary area of said set can comprise a network of several coupling waveguides, and a network of several first optoelectronic components can be produced for each of the elementary areas of said set, so that the first optoelectronic components of a same network are respectively opposite the corresponding coupling waveguides.
    The method may include a step of transferring a plurality of first pads from which a plurality of laser diodes is produced and a step of transferring a plurality of second pads from which a plurality of photodiodes is produced or a plurality of electro-optical modulators.
    BRIEF DESCRIPTION OF THE DRAWINGS Other aspects, aims, advantages and characteristics of the invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of nonlimiting example, and made with reference to the accompanying drawings in which:
    FIG. 1A, already described with reference to the prior art, schematically illustrates, in top view, an example of optoelectronic chips formed at the level of a reception substrate; and FIG. 1B, already described, is a detailed view of four adjacent optoelectronic chips illustrated in FIG. IA;
    FIGS. 2A to 2D illustrate in a partial and schematic manner, in cross section along the line A-A of FIG. IB, different stages of a conventional process for the collective production of optoelectronic chips;
    FIG. 3 partially and schematically illustrates, in top view, the surface which a sticker presents during different stages of the conventional method described above, allowing the production, for an elementary area, of a network of four coupled laser diodes coupling waveguides;
    FIGS. 4A to 4D illustrate in a partial and schematic manner, in cross section along the line B-B in FIG. 5A, different stages of a process for the collective production of optoelectronic chips according to an embodiment of the invention;
    FIG. 5A partially and schematically illustrates, in top view, an example of four optoelectronic chips produced on a reception substrate by the method described with reference to FIGS. 4A to 4D;
    FIG. 5B partially and schematically illustrates, in top view, the surface which a sticker presents during different stages of the process illustrated with reference to FIGS. 4A to 4D, allowing the production, from a single vignette, of several arrays of laser diodes of a set of four adjacent elementary areas;
    FIGS. 6A, 6B and 6C partially and schematically illustrate, in top view, different variants of optoelectronic chips produced on a receiving substrate, in which the arrays of laser diodes of a set of adjacent elementary areas are obtained from of the same sticker III-V.
    DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS In the figures and in the following description, the same references represent the same or similar elements. In addition, the different elements are not shown to scale so as to favor the clarity of the figures. Furthermore, the different embodiments and variants are not mutually exclusive and can be combined with one another. Unless otherwise indicated, the terms "substantially", "approximately", "in the order of" mean to the nearest 10%.
    The invention relates to the collective production of optoelectronic chips, by a technique for transferring pads, also called vignettes, on a functionalized receiving substrate.
    By optoelectronic chip means a device comprising at least a first optoelectronic component capable of emitting, detecting or even modulating electromagnetic radiation, produced on the basis of a given semiconductor compound, which rests on the receiving substrate. The first optoelectronic component is said to be made based on the given semiconductor compound in the sense that it mainly comprises said semiconductor compound. It may include a stack of thin layers made of different alloys made up or comprising said semiconductor compound. Each chip also includes passive and / or active photonic components. Each first optoelectronic component is optically coupled to a so-called coupling waveguide, integrated into the reception substrate, which forms at least part of a photonic circuit. The optoelectronic chips are produced at the level of so-called elementary zones of a reception substrate, the elementary zones forming surfaces distinct from each other of the substrate. The photonic circuit of an optoelectronic chip which can be produced from an elementary pattern identical or similar to each of the optoelectronic chips. The elementary pattern can thus be defined at the level of a mask used during photolithography steps.
    The pads, or vignettes, each comprise a semiconductor portion produced by epitaxial growth from a growth substrate. The semiconductor portion is made from the semiconductor compound mentioned above, and is intended to allow the production of one or more first optoelectronic components. The pads may have a surface, in the plane parallel to the plane of the receiving substrate, of the order of a few square millimeters, and a thickness of the order of a few tens of microns to a few hundred microns. The semiconductor compound is preferably of the III-V type, that is to say it is an alloy comprising at least one element from column III and at least one element from column V of the periodic table. The semiconductor compound can be, for example, InP or GaAs. The vignettes are then called III-V vignettes.
    The semiconductor portion may be a heterostructure comprising a stack of a first N-doped layer, and a second P-doped layer, arranged relative to each other so as to form a PN or PIN junction, between which may be located at least one intermediate layer forming a quantum well, possibly interposed between barrier layers. The quantum well (s) and the barrier layers are intrinsic, that is to say unintentionally doped, and are produced based on the semiconductor compound. As examples, the heterostructure can be of the InGaAsP / InP, InAlGaAs / InP, AlInGaAs / GaAs, or other type. Thus, in the case of a semiconductor compound in InP, the doped layers can be in InP, the quantum wells in InAsP and the barrier layers in InGaAsP.
    The receiving substrate is said to be functionalized in the sense that it comprises at least one passive optical transmission component, namely a coupling waveguide, integrated in the substrate, that is to say made at the level from or under the front face of the receiving substrate. It can also include other passive optical components (multiplexers or demultiplexers, fiber optic couplers, etc.) and / or active optical components (modulators, etc.), optically coupled to one another so as to form a photonic circuit. says integrated. The receiving substrate can be of the SOI type, that is to say that it can comprise a thin surface layer of silicon and a solid layer of silicon, between which is interposed a layer of silicon oxide called BOX (buried oxide, in English). The thin surface layer can be covered with a layer allowing the bonding of the sticker on the front face of the receiving substrate, for example an oxide layer in the case of bonding by molecular adhesion.
    In general, the optoelectronic chips can be Tx transmitters in which there is a network of laser diodes coupled to coupling waveguides, as well as, for example, modulators, at least one multiplexer and a coupler to an optical fiber. They can also be Rx receivers comprising photodiodes, a demultiplexer and a coupler; or even be transceivers comprising both laser diodes and photodiodes. In the context of the invention, the optoelectronic chips are, purely by way of illustration, Tx transmitters comprising laser diodes made from a III-V semiconductor compound, optically coupled to coupling waveguides of a photonic circuit, the latter being integrated in a receiving substrate made from silicon, for example of the SOL type [0032] FIGS. 2A to 2D are views, partial and schematic, in section along the axis AA illustrated in FIG. IB , of different stages of an example of a conventional method for producing optoelectronic chips by transferring vignettes to a receiving substrate, and more particularly the production of first optoelectronic components, here laser diodes, optically coupled to an integrated photonic circuit. In this example, the labels are made from a III-V semiconductor compound and the receiving substrate is of the SOL type. Only certain stages of the production method are illustrated and described here.
    We define here and for the following description a direct three-dimensional orthogonal coordinate system (Χ, Υ, Ζ), where the axes X and Y form a plane parallel to the plane of the front face of the receiving substrate, and where l Z axis is oriented substantially orthogonal to the plane of the receiving substrate.
    In this example, the III-V labels are pads distinct from each other comprising a semiconductor portion produced based on a IIIV semiconductor compound, for example InP or GaAs, and is here formed of a stack of thin layers in which the III-V semiconductor compound is predominant. They also comprise the growth substrate from which the respective semiconductor portions are produced. This is made of a material having a good ratio of the lattice parameter with that of the III-V semiconductor compound. It can be produced in the same III-V semiconductor compound, for example in InP, or even in an alloy comprising the same elements III and V of the III-V semiconductor compound. By way of illustration, the growth substrate can be in InP when the vignettes are of the InGaAsP / InP type. The receiving substrate is made from silicon, and can be an SOI substrate. It includes so-called photonic components integrated in the sense that they are located inside the same receiving substrate, and here are coupling waveguides, silicon modulators, and a silicon wavelength multiplexer . The coupling guides form an optical path between the diodes and the modulators.
    2Aillustrates a step of transferring a plurality of labels 6 on the receiving substrate 1. Each label 6 comprises a semiconductor portion 7 and a growth substrate 8. The transfer is carried out so that the free face of each semiconductor portion 7, that is to say the face opposite to the growth substrate 8, comes into contact with the front face 1a of the receiving substrate 1. The labels 6 are here fixed to the receiving substrate 1 by molecular bonding, by means of an oxide layer (not shown) located at the interface between the sticker 6 and the receiving substrate 1, for example a layer of silicon oxide of a few nanometers to a few tens of nanometers thick.
    The thumbnails 6 are each positioned in an elementary zone z of the receiving substrate 1, in this case one label 6 per elementary zone z, although, as a variant, several separate labels can be deposited on the same elementary zone . Here, the thumbnails 63 and 64 are respectively positioned in the elementary areas z3 and z4. The elementary zones z are located between the dotted lines, and are intended to delimit the surface of the optoelectronic chips P, here in particular P3 and P4 (fig.2D), which will be individualized during a subsequent step of cutting the receiving substrate. 1.
    In each elementary area z is located at least one photonic circuit comprising photonic components of which only a coupling waveguide 3 and a modulator 4 are shown here. The photonic circuit is here said to be integrated insofar as it comprises several photonic components (a guide 3, a modulator 4, etc.) manufactured on the same reception substrate 1 and situated inside the latter. Here, in the case of the elementary zone z4, the photonic circuit comprises a network of coupling waveguides 34, each coupling waveguide 34 comprising a first portion 3e4 called coupling, allowing the optical coupling between the diodes laser 24 and the waveguides 343058830 Each sticker 63, 64 is positioned in a different elementary zone z3, z4, so as to partially cover the coupling waveguides 33, 34 of the corresponding photonic circuit, at the level respective coupling parts 3e3, 3e4.
    The thumbnails 6 reported have an initial surface S®Jj em , in the XY plane, for example equal to Li elem x Li elem in the case of a square profile. The initial surface S® ^ em depends on the number of diodes 2 to be produced opposite the coupling waveguides 3, and can be of the order of a few square millimeters. Of course, the thumbnails 6 can have other types of profri in the XY plane, for example rectangular, polygonal, circular or other.
    FIG. 2B illustrates a preferential step for removing the growth substrate 8. The removal can be carried out by chemical etching, optionally preceded by mechanical thinning. The thickness of the labels 6 then corresponds substantially to that of the semiconductor portions 7.
    Lateral over-etching of the semiconductor portions 7, in the XY plane, is likely to occur during the removal of the growth substrate, especially when the material of the growth substrate 8 is an alloy comprising at least the same elements III and V as those of the III-V semiconductor compound on the basis of which the semiconductor portions 7 are formed. This is the case for example when a growth substrate 8 in InP is used for the growth of a semiconductor portion 7 based on InP, for example of the InGaAsP / InP type, and that the growth substrate 8 is removed by chemical etching with hydrochloric acid.
    The semiconductor portion 7 of the labels 6 then has a surface Sf lem in the XY plane, for example Ll elem x Ll elem in the case of a square profile, smaller than the initial surface Si. By way of example, the semiconductor portion 7 can be etched from its lateral border 71 over a distance of approximately 300pm, which results in: Ll elem = Li elem - 2 x 300pm.
    FIG. 2C illustrates a next step in the production here of a network of four laser diodes 2 from each semiconductor portion 7. The laser diodes 2 are here ribbon diodes, which have a length Lf along the axis longitudinal X greater than a width lf along the transverse axis Y, but other diodes are possible, such as for example VCSEL laser diodes (for Vertical-Cavity Surface-Em itting Laser). Such a ribbon laser diode 2 includes a waveguide located in the semiconductor portion 7 which forms the optical amplification material (SOA for Semiconductor Optical Amplifier, in English), and is arranged opposite along the Z axis of a coupling waveguide 3 to allow optical coupling between the two guides. An example of a ribbon laser diode is described in particular in document EP2811593. The laser diodes 2 are produced by conventional lithography and etching steps, so that each laser diode 23, 24 is located opposite, along the Z axis, of a coupling part 3e3, 3e4 of a guide d coupling wave 33, 34, so that the diode 2 is optically coupled to the corresponding coupling waveguide 3. Metal contacts (not shown) are also made so as to be able to inject a pumping current into the different diodes 2.
    FIG. 2D illustrates the step of cutting the receiving substrate 1 along the cutting lines L, so as to obtain a plurality of optoelectronic chips P distinct from each other. In this example, the chips P3 and P4 are obtained by cutting in particular along the line L34. The separation of the optoelectronic chips P can be carried out by mechanical cutting and / or by laser, by chemical etching, by physical etching, or other.
    Figure 3 schematically illustrates, in top view, a network of four laser diodes 2 in ribbon produced from the same label 6 and arranged opposite, along the Z axis, of waveguides coupling 3 of the same photonic circuit, and illustrates in particular the surface in the XY plane presented by the vignette 6 during different stages of the conventional production process.
    In this example, the laser diodes 2 in ribbon each have a length Lf of about 800 pm along the longitudinal axis X, for a width lf of about 50 pm along the transverse axis Y, and are spaced from one another by distance of about 200pm along the Y axis, here from edge to edge. To obtain these dimensions, the lithography and etching steps generally imply having a semiconductor portion 7, and therefore a sticker 6, of an initial surface called useful S®J, em of lxlmm 2 approximately.
    However, in practice, it may be necessary to provide an initial area called S®Jj em necessary label 6 much larger than the initial useful area S®J, em . Indeed, it is necessary to take into account a positioning uncertainty of the sticker 6, of the order of ± ± 200 μm, with respect to the coupling waveguide (s) 3 of the corresponding elementary zone. In addition, it may also be necessary to take into account any lateral over-etching of the semiconductor portion 7 which can take place during the step of removing the growth substrate 8, which can be of the order of 300 μm from of the lateral border 71 of the semiconductor portion 7.
    Thus, by way of example, to have a semiconductor portion 7 of a useful initial surface S®J, em of about lxlmm 2 making it possible to obtain the laser diodes 2 with the desired dimensions and correctly positioned opposite , along the Z axis, of the respective coupling waveguides 3, it may be necessary to transfer a sticker 6 of a necessary initial surface area S®Jj em of approximately 2x2mm 2 , ie 4mm 2 . Indeed, a label 6 with an S®Jj em surface of 4 mm 2 can provide a semiconductor portion 7 of an S® lem surface of 1.4 × 1.4 = 2.0 mm 2 approximately, after removal of the growth substrate 8 and lateral over-etching of the material of the semiconductor portion 7, this surface then corresponding to the initial useful surface S®J, em of lxlmm 2 increased by 200pm at the level of the lateral border 71 in the XY plane, to take into account the positioning uncertainty.
    Thus, it follows that, in general, it is necessary to provide a necessary initial surface S® 1 / ” 1 of material of the semiconductor portion 7 much larger than the useful initial surface S®J, em , of the order of 4 times greater in this example, which results in high manufacturing costs. In addition, this results in a loss of material of the semiconductor portion 7 between the required initial surface S® 1 / ” 1 and the useful initial surface S® 1 , ®” 1 of the order of 75% in this example.
    To reduce manufacturing costs, the method according to the invention proposes to use the same sticker for the production of first optoelectronic components of a set E of several adjacent optoelectronic chips, which results in a reduction in the initial surface area necessary with respect to the useful initial surface area, related to each elementary zone of optoelectronic chip, as well as by a reduction in the lost volume of the material of the semiconductor portion of the labels.
    For this, each label is transferred to the receiving substrate so as to extend over a set E of at least two adjacent elementary areas, and preferably over a set E of four adjacent elementary areas in pairs, thus partially covering at least one coupling waveguide of each of said adjacent elementary areas. During the step of producing the first optoelectronic components, said first components produced from the same vignette can thus be located opposite, along the Z axis, the respective coupling waveguides of said adjacent elementary zones, so that each first optoelectronic component is optically coupled to the corresponding coupling waveguide.
    As detailed below, the arrays of first optoelectronic components of a set E of two adjacent elementary areas are arranged so as to be located near a separation line, or cutting. The same applies to the networks of coupling waveguides, at the level of their coupling parts. Generally, a dividing line passes between two adjacent elementary areas, and forms a border which is common to these two adjacent elementary areas. The arrays of first optoelectronic components can also be spaced, with respect to this separation line, by an identical distance, advantageously less than 600pm, for example less than or equal to 300pm. They are spaced from each other by a distance greater than for example 10pm, for example greater than or equal to 50pm. Furthermore, they may exhibit, one with respect to the other, a mirror symmetry with respect to the plane formed by said dividing line (here parallel to the X or Y axis) and the axis of thickness Z.
    FIGS. 4A to 4D illustrate an example of a method for producing optoelectronic chips P making it possible to limit the initial surface area of semiconductor material necessary for producing the diodes 2 of each optoelectronic chip P, and therefore to limit manufacturing costs. The figures are schematic and partial views of adjacent optoelectronic chips P1, P2, for different stages of the method, according to the section plane B-B of FIG. 5A. In this example, the thumbnails 6 and the receiving substrate 1 are similar, in terms of material, to those of the example of FIGS. 2A to 2D. The first optoelectronic components here are laser diodes.
    FIG. 4A illustrates the step of transferring vignettes 6 onto the reception substrate 1. Each vignette 6 comprises a semiconductor portion 7 based on the III-V semiconductor compound, for example a heterostructure based on InP forming a PN or PIN junction, the free face of which is brought into contact with the front face of the receiving substrate 1. It also includes the growth substrate 8 from which the semiconductor portion 7 was produced by epitaxial growth.
    Here, each label 6 is transferred to the receiving substrate 1 so that it extends over a set E of at least two adjacent elementary areas, and in this example over a set E of four adjacent elementary areas two by two, here zl, z2, z3, z4 in the example of fig. 5A. It thus covers at least one coupling waveguide 3 of the photonic circuit, and here a network of four coupling waveguides 3, of each of the adjacent elementary zones zl, z2, z3, z4 of said set E. Each label 6 thus extends continuously over part of the four adjacent elementary zones, without breaking of the sticker material between the different adjacent zones.
    Each sticker 6 has a necessary initial surface S® ” s , for example of dimensions Li ens x Li ens in the case of a square section in the XY plane, where Li ens is a dimension of the sticker 6 in the XY plane. The initial surface S® ” s is adapted so as to cover the coupling waveguides 3, at their respective coupling parts 3e, of each adjacent elementary zone zl, z2, z3, z4 of the same set E.
    FIG. 4B illustrates a preferential step for removing the growth substrate 8. As previously, the removal can be carried out by chemical etching, possibly preceded by mechanical thinning. The thickness of the labels 6 is then reduced so as to substantially equal that of the semiconductor portions 7.
    In the case of a lateral over-etching of the semiconductor portion 7 of the labels 6, the semiconductor portion 7 then has a surface Sf ns in the XY plane, for example Links x Ll ens in the case of a profile square, less than S® ” s By way of example, the lateral border 71 of the semiconductor portion 7 can be etched over a width of approximately 300 μm, in other words: Ll ens = Li ens - 2 x 300pm.
    FIG. 4C illustrates a step of structuring the semiconductor portion 7 to produce at least one diode 2i, 22, 23, 24 for each adjacent elementary area zl, z2, z3, z4 of the same set E. In this example, from the same semiconductor portion 7, an array of several laser diodes 2 is produced for each of the photonic circuits of the adjacent elementary zones zl, z2, z3, z4 of the same set E.
    The laser diodes 2 are here also strip laser diodes 2, which have a length Lf along the longitudinal axis X and a width lf along the transverse axis Y. The laser diodes 2 are produced by conventional steps of lithography and etching, so that each laser diode 2 is located opposite, along the Z axis, of the coupling part 3e of a coupling waveguide 3 of the photonic circuit of the corresponding elementary area.
    FIG. 4D illustrates the step of cutting the receiving substrate 1 along the cutting lines L, so as to obtain a plurality of optoelectronic chips P distinct from each other.
    As will be shown with reference to the example of FIGS. 5A and 5B, the use of the same label 6 for producing the diodes 2 of a set E of adjacent elementary zones makes it possible to reduce the initial surface area required of semiconductor material per elementary area, and therefore reduce manufacturing costs.
    FIG. 5A schematically illustrates a set E of optoelectronic chips Pl, P2, P3, P4 adjacent two by two, produced using the production method described with reference to FIGS. 4A to 4D. FIG. 5B is a schematic view which illustrates in detail the first optoelectronic components 2, here laser diodes, of a set E of several optoelectronic chips P1, P2, P3, P4 adjacent in pairs, as well as the different surfaces that presents sticker 6 during the production process.
    Here, a set E of four optoelectronic chips Pl, P2, P3, P4 adjacent two by two are formed on the receiving substrate. They are distinct from each other at the level of the cutting lines L12, L23, L34, L14, or dividing line, shown diagrammatically by the dotted lines. In this example, each optoelectronic chip P1, P2, P3, P4 comprises an array of several laser diodes 2i, 22, 23, 24 coupled to a photonic circuit comprising photonic components integrated in the reception substrate, such as guides wave, modulators, and a wavelength multiplexer.
    The photonic circuit thus comprises a network of several coupling waveguides (represented here by arrows starting from the diodes), the coupling parts of which are located opposite, along the Z axis, of the laser diodes 2 ( fig.4A), so that each laser diode 2 is optically coupled to the corresponding coupling waveguide 3. Each photonic circuit here comprises optical paths each formed by a coupling waveguide optically coupled to a laser diode 2 and coupling each laser diode 2 to a modulator, as well as each output of a modulator to an input of the multiplexer in wavelengths.
    Insofar as the arrays of laser diodes 2 of the adjacent elementary zones zl, z2, z3, z4 were produced from the same label 6, they are located in the adjacent corners two by two of the elementary zones zl , z2, z3, z4 of the same set E. More precisely, the array of diodes 2 of an elementary area of said set E, for example of the area zl, is located in an adjacent corner of the three other elementary areas z2, z3, z4 of said set E.
    Furthermore, at least a first diode of a first elementary area and at least a second diode of a second adjacent elementary area of said assembly E, said first and second diodes being produced from the same vignette, are located near the dividing line forming a border common to said first and second adjacent elementary zones. The first and second diodes may be spaced apart from the separation line by an equal distance, which may be less than 600pm, for example less than or equal to 300pm, for example equal to approximately 100pm. This distance can be greater than or equal to ten microns, for example at 10 pm, or even a few tens of microns, for example at 50 pm in the case of a cutting blade width of 50 pm.
    In the example of FIG. 5A, the coupling parts of the coupling waveguides 31 of the elementary zone zl and those of the coupling waveguides 32 of the elementary zone z2 are preferably located in the vicinity of the separation line L12 forming a border common to the elementary areas zl and z2. More precisely, the coupling parts of the coupling guides 31 of the elementary zone z1 can be located at a distance from the separation line L12 less than that separating them from the separation line opposite and parallel to the line L12. Similarly, the coupling parts of the coupling guides 32 of the elementary zone z2 are located at a distance from the separation line L12 less than that separating them from the separation line opposite and parallel to the line L12.
    Preferably, the laser diodes 2i of the elementary area zl are located at the same distance from the separation line L12 as the laser diodes 22 of the elementary area z2. This distance corresponds to the minimum distance between an edge of the diode considered and the separation line. Thus, the diodes 2i of the elementary zone zl are spaced from the diodes 22 of the elementary zone z2 by a distance, from edge to edge, which can be less than 1.2 pm, for example less than or equal to 600 pm, for example equal at around 200pm. This distance is however greater than or equal to ten microns, for example at 10 pm, or even a few tens of microns, for example at 50 pm. This limits the surface area of the semiconductor portion necessary for producing the diodes of the adjacent elementary zones of the same assembly E.
    Furthermore, the coupling waveguides 31 of the elementary zone zl and those 32 of the elementary zone z2 are arranged mutually so that the respective coupling parts of the coupling guides 31 of the elementary zone zl are in opposite, in the XY plane, the coupling parts of the coupling guides 32 of the elementary zone z2, that is to say face to face, along the longitudinal axis of the coupling waveguides at the level of the respective coupling parts, here parallel to the axis X. In addition, the coupling guides 3i of the elementary zone zl and those 32 of the elementary zone z2 extend respectively, from their respective coupling parts, according to directions opposite to each other. In this example, the coupling guides 31 of the elementary zone z1 extend in the direction -X while the coupling guides 32 of the elementary zone z2 extend in the direction + X. Each coupling guide 31 of the elementary zone z1 is positioned coaxially with a coupling guide 32 of the elementary zone z2.
    Preferably, the coupling waveguides 31 of the elementary zone zl and those 32 of the elementary zone z2 extend, from their respective coupling parts, so as to present each other. -vis others, an axial symmetry, or mirror symmetry, with respect to the line of separation L12. This makes it possible to simplify the prior production of the photonic circuits, insofar as it is then possible to use a photolithography mask (stepper, in English) which optically covers the set E of adjacent elementary zones zl to z4, and no longer , as in the example of the prior art, a mask for each elementary zone. The application of this mask is then repeated, or photo-repeated, for each of the sets E of adjacent zones.
    As regards the adjacent elementary zones zl and z4, the coupling waveguides 31 of the elementary zone zl and the coupling waveguides 34 of the elementary zone z4 are here located near the line separation L14. More precisely, the coupling guides 31 of the elementary zone z1 are located at a distance from the separation line L14 less than that separating them from the separation line opposite and parallel to the line L14. Similarly, the coupling guides 34 of the elementary zone z4 are located at a distance from the separation line L14 less than that separating them from the separation line opposite and parallel to the line L14.
    Preferably, the diode 3i of the elementary zone zl closest to the separation line L14 is located at the same distance from the separation line L14 as the diode 34 of the elementary zone z4 closest to the line L14. In the same way, these neighboring diodes 31, 34 can be spaced from one another by a distance which can be less than 1.2 pm, for example less than or equal to 600 pm, for example equal to approximately 200 pm. This distance can be greater than or equal to ten microns, for example at 10pm or even 50pm. This limits the area of the semiconductor portion necessary for producing the diodes of the adjacent zones of the same assembly E.
    Furthermore, the coupling waveguides of the elementary zone zl and those of the elementary zone z4 extend, from their respective coupling parts, in directions parallel to each other, here following the direction -X. In this example, the respective coupling parts of the coupling guides 3i and those of the coupling guides 34 are aligned along an axis parallel to the separation lines L12 and L34.
    Preferably, the coupling waveguides 31 of the elementary zone zl and those 34 of the elementary zone z4 extend, from their respective coupling parts, so as to present, each opposite -vis others, an axial symmetry with respect to the line of separation L14. As previously, this here makes it possible to simplify the prior production of the photonic circuits by the optical application of a photolithography mask (stepper, in English) common to each set E of adjacent elementary zones.
    With reference to FIG. 5B, by way of example, for producing the laser diode networks
    2i, 2 2 , 23, 24 of the four adjacent elementary zones zl, z2, z3, z4 of the same set E, where each laser diode 2 has a length Lf of approximately 800 μm for a width lf of
    50pm approximately, and is spaced from the neighboring laser diodes 2 by a distance of approximately 200pm edge to edge, the sticker 6 has an initial surface area required S® ” s greater than the total initial useful surface area S®” s , the latter being substantially equal to the sum of the initial useful surfaces called elementary S®Jj em which can be here, as in the example of fig.3, of the order of lxlmm 2 .
    Thus, to obtain a semiconductor portion 7 which has continuously, without breaking of material, a total initial useful surface S® ” s substantially equal to 4xS®J, em , we take into account the positioning uncertainty of the sticker 6, here of the order of about ± 200 μm, with respect to the coupling waveguides 3i, 32, 33, 34 of the adjacent elementary zones zl, z2, z3, z4 of the same set E. In addition, we can take into account the possible lateral over-etching of the semiconductor portion 6 during the step of removing the growth substrate 7, for example of the order of 300 μm from the lateral border 71 of the semiconductor portion 7 .
    Thus, in this example, to obtain a total initial useful area S® ” s of 4x (lxl) mm 2 approximately, the sticker 6 can then have a total initial necessary surface S®” s of 3x3 = 9mm 2 approximately . In fact, a label 6 with a surface S® ” s of 9mm 2 can provide a semiconductor portion 7 of a surface Sf ns of 2.4 × 2.4 = 5.8 mm 2 after removal of the growth substrate 8 and on lateral engraving of 300 μm of semiconductor material from the lateral border 71 of the semiconductor portion 7. This surface area S® ns then corresponds to the initial total useful surface area S® ” s increased by 200 pm at the level of the lateral border 71 of the semiconductor portion 7, in the XY plane, to take into account the positioning uncertainty.
    Thus, unlike the prior art, to obtain a useful initial elementary area S®ù em of lxlmm 2 for each elementary area, the use of the same sticker for producing the diodes of the adjacent elementary areas of a total initial surface area required S® ” s of 3x3 = 9mm 2 , makes it possible to reduce the initial surface area required S®Jj em , by elementary zone, to 9/4 = 2.5mm 2 , instead of 4mm 2 as in the example of fig. 3. Thus, compared with the example of FIG. 3, it follows that the initial surface area S®Jj em of material of the semiconductor portion is no more than, per elementary area, of the order of 2.5 times the initial useful area S®ù em , which results in a substantial reduction in the quantity of semiconductor material required per elementary zone, and therefore a reduction in manufacturing costs. This also results in a reduction in the loss of material from the semiconductor portion, per elementary zone, corresponding to the difference between the initial surface area required S®Jj em and the initial useful surface area S®ù em , here of the order of 60 % in this example, and not more than 75% as in the example in fig. 3.
    The production method also allows, with an equal number of optoelectronic chips, to use and manipulate a reduced number of pads, the latter being divided by 2 or by 4 relative to the number of pads of the example of prior art. It can also be used to handle larger studs. The complexity and the duration of execution of the process are thus reduced.
    Unlike the example of the prior art, it is then possible to use, for the production of the photonic circuits of each chip, a photolithography mask (stepper, in English) whose pattern is optically applied. to a set E of adjacent elementary zones, and no longer to a single elementary zone. Thus, the pattern of the mask applied optically for each of the sets E of adjacent zones, and no longer for each of the elementary zones as in the prior art. This simplifies the production process and reduces the time it takes to complete it.
    While in the example of the prior art, the pattern of the lithography mask is identical from one elementary zone to the other, it is here identical to a set E of zones adjacent to the other. Within the same set E, a first sub-pattern corresponding to a first elementary area has mirror symmetry to a second sub-pattern corresponding to a second elementary area, the latter being adjacent to the first elementary area.
    FIG. 6A schematically and partially illustrates a variant of the mode shown in FIG. 5A, in which the diodes 21, 2 2 of the adjacent elementary zones zl and z2 are produced from the same vignette, and the diodes 2 2 , 24 of the adjacent elementary zones z3 and z4 are produced from another vignette, distinct from the previous one. The coupling waveguides of the zone z1 have, at their respective coupling parts, an axial symmetry with respect to the line L12 with respect to the coupling waveguides of the zone z2. It is the same for the coupling guides of the zone z4 with respect to those of the zone z3 with respect to the line L34.
    FIG. 6B schematically and partially illustrates a variant of that shown in FIG. 6A, in which the diodes 2i, 24 of the adjacent elementary zones zl and z4 are produced from the same vignette, and the diodes 2 2 , 2 <of the adjacent elementary areas z2 and z3 are produced from another thumbnail, distinct from the previous one. The coupling waveguides of the zone z1 have, at their respective coupling parts, an axial symmetry with respect to the line L14 with respect to the coupling waveguides of the zone z4. It is the same for the coupling guides of the zone z2 vis-à-vis those of the zone z3 with respect to the line L23.
    FIG. 6C schematically and partially illustrates another variant in which the same elementary zone comprises a transmitter Tx with laser diodes, and a receiver Rx with photodiodes. In this example, the transmitter Tx is identical to that described above and the receiver Rx comprises a network of photodiodes optically coupled to a waveguide, itself coupled to a demultiplexer, the waveguides and the demultiplexer being integrated in inside the receiving substrate. Tx transmitters and Rx receivers may include other photonic components, such as couplers to optical fibers.
    The process for the collective production of optoelectronic chips then includes a step of postponing first pads, or vignettes, where each first vignette, produced on the basis of a first semiconductor compound, extends over a set E of several elementary zones adjacent. In this example, the same first vignette allows the laser diodes of a set E of the adjacent elementary zones zl2, zl3, z22, z23 to be produced.
    The method also includes a step of postponing second studs, or vignettes, of a different nature, preferably carried out simultaneously with the step of postponing the first studs. The second studs are produced on the basis of a second semiconductor compound, identical or different from the first semiconductor compound, and of which transferred to a set E 'of several adjacent elementary zones, this set E' being different from the set E but may include elementary areas common to the latter. In this example, the same second vignette allows the production of the photodiodes of a set E ’of the adjacent elementary zones z21, z22, z31, z32. It is therefore distinct from the set E but comprises, in common with the latter, the elementary zone z22.
    Particular embodiments have just been described. Different variants and modifications will appear to those skilled in the art.
    Thus, each optoelectronic chip can comprise an electroabsorption modulator, produced on the basis of a third semiconductor compound different or similar to the semiconductor compound of laser diodes and / or photodiodes, and obtained from a third pad or vignette . As mentioned previously, the third vignettes can be transferred to another set E "of several adjacent elementary zones, this set E" being distinct from the sets E and E ’but may include elementary areas common with the latter.
    Furthermore, each first optoelectronic component, such as a laser diode, a photodiode or an electro-absorption modulator, can also be electrically connected to an integrated circuit present in the corresponding elementary area. The integrated circuit thus comprises electrically conductive tracks located inside the reception substrate, as well as an electrically conductive thin layer located on the surface of the reception substrate, on which the first optoelectronic component rests.
    权利要求:
    Claims (16)
    [1" id="c-fr-0001]
    1. Method for the collective production of a plurality of optoelectronic chips (PI, P2), comprising the following steps:
    i) providing a receiving substrate (1), comprising a plurality of so-called elementary zones (zl, z2) each intended to delimit an optoelectronic chip (PI, P2), each elementary zone (zl, z2) comprising at least one said coupling waveguide (3i, 32), integrated in the receiving substrate (1), intended to be optically coupled to a first optoelectronic component (2i, 22);
    ii) transfer of a plurality of pads (6) to the elementary areas (zl, z2), so that the pads (6) partially cover the coupling waveguides (31, 32);
    iii) making said first optoelectronic components (2i, 22) from said studs (6), so that each first optoelectronic component (2i, 22) faces at least one coupling waveguide (31, 32 ) of the corresponding elementary zone (zl, z2);
    characterized in that, following the transfer step, each stud (6) extends over an assembly (E) of at least two adjacent elementary zones (zl, z2), so as to partially cover at least a coupling waveguide (3i, 32) of each of said adjacent elementary areas (zl, z2).
    [2" id="c-fr-0002]
    2. Method according to claim 1, in which, during the step of producing the first optoelectronic components, each of the first optoelectronic components (2i, 22) produced from the same pad (6) is located opposite one of the coupling waveguides (3i, 32) of the adjacent elementary zones (zl, z2) of the same assembly (E).
    [3" id="c-fr-0003]
    3. Method according to claim 1 or 2, in which at least a first optoelectronic component (2i) of a first elementary area (zl) and at least a second optoelectronic component (22) of a second elementary area (z2) adjacent to the first elementary zone (zl) and belonging to said same assembly (E), said first and second optoelectronic component (2i, 22), being produced from the same stud (6), are respectively spaced by a distance equal to a dividing line (L12), forming a border common to said first and second adjacent elementary zones (zl, z2).
    [4" id="c-fr-0004]
    4. The method of claim 3, wherein said distance is less than 600pm.
    [5" id="c-fr-0005]
    5. Method according to claim 3 or 4, wherein said first optoelectronic component (2i) and said second optoelectronic component (2î) are spaced from each other by a distance of less than 1.2pm.
    [6" id="c-fr-0006]
    6. Method according to any one of claims 1 to 5, in which a first optoelectronic component (2i) is located opposite a coupling portion (3ei) of a first coupling waveguide (31) d '' a first elementary zone (zl) of an assembly (E), and a second optoelectronic component (2î) is located opposite a coupling portion (3e2) of a second coupling waveguide (32) of a second elementary zone (z2) adjacent to the first elementary zone (zl) and belonging to said same assembly (E), the first and second coupling waveguides (31, 32) extending from their respective coupling parts (3ei, 3e2), in parallel.
    [7" id="c-fr-0007]
    7. The method of claim 6, wherein said first and second coupling waveguides (3i, 32) extend from their respective coupling portions (3ei, 3e2), in opposite directions one to the other.
    [8" id="c-fr-0008]
    8. The method of claim 6, wherein said first and second coupling waveguides (3i, 32) extend from their respective coupling portions (3ei, 3e2), in parallel directions one to the other.
    [9" id="c-fr-0009]
    9. Method according to any one of claims 6 to 8, in which the first coupling waveguide (31) and the second waveguide (32) extend from their coupling parts (3ei , 3e2) respective, so as to present, one with respect to the other, an axial symmetry with respect to said dividing line (L12).
    [10" id="c-fr-0010]
    10. Method according to any one of claims 1 to 9, wherein each pad (6) extends over a set (E) of four elementary zones (zl, z2, z3, z4) adjacent in pairs.
    [11" id="c-fr-0011]
    11. Method according to any one of claims 1 to 10, in which each pad (6) comprises a semiconductor portion (7) produced based on a semiconductor compound, and a growth substrate (8) from which is produced. by epitaxy the semiconductor portion (7).
    [12" id="c-fr-0012]
    12. The method of claim 11, comprising a step of removing the growth substrate (8), the latter being made of an alloy based on said semiconductor compound.
    [13" id="c-fr-0013]
    13. Method according to any one of claims 1 to 12, in which each pad (6) comprises a semiconductor portion (7) produced based on a III-V semiconductor compound.
    [14" id="c-fr-0014]
    14. Method according to any one of claims 1 to 13, in which the first optoelectronic component is a laser source, a photodiode or an electro-optical modulator.
    [15" id="c-fr-0015]
    15. Method according to any one of claims 1 to 14, in which each elementary zone (zl, z2) of said assembly (E) comprises an array of several coupling waveguides (3i, 32), and in which, a network of several first components
    10 optoelectronics (2i, 22) is produced for each of the elementary zones (zl, z2) of said assembly (E), so that the first optoelectronic components (2i; 22) of the same network are respectively opposite the guides of corresponding coupling wave (3i; 32).
    [16" id="c-fr-0016]
    16. Method according to any one of claims 1 to 15, comprising a step of
    15 transfer of a plurality of first pads from which a plurality of laser diodes (2) is produced and a step of transfer of a plurality of second pads from which a plurality of photodiodes (10) or a plurality of circuits are produced electro-optical modulators.
    1/6
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    同族专利:
    公开号 | 公开日
    US10884187B2|2021-01-05|
    CA3043644A1|2018-05-17|
    JP2019536097A|2019-12-12|
    US20190265413A1|2019-08-29|
    FR3058830B1|2018-11-30|
    CN110178064A|2019-08-27|
    CN110178064B|2021-07-02|
    EP3538937A1|2019-09-18|
    WO2018087485A1|2018-05-17|
    EP3538937B1|2020-12-02|
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    法律状态:
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    2018-05-18| PLSC| Search report ready|Effective date: 20180518 |
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    优先权:
    申请号 | 申请日 | 专利标题
    FR1660967A|FR3058830B1|2016-11-14|2016-11-14|PROCESS FOR THE COLLECTIVE PRODUCTION OF A PLURALITY OF OPTOELECTRONIC CHIPS|
    FR1660967|2016-11-14|FR1660967A| FR3058830B1|2016-11-14|2016-11-14|PROCESS FOR THE COLLECTIVE PRODUCTION OF A PLURALITY OF OPTOELECTRONIC CHIPS|
    US16/349,173| US10884187B2|2016-11-14|2017-11-10|Method for the collective production of a plurality of optoelectronic chips|
    CA3043644A| CA3043644A1|2016-11-14|2017-11-10|Method for the collective production of a plurality of optoelectronic chips|
    JP2019525005A| JP2019536097A|2016-11-14|2017-11-10|Method for joint production of multiple optoelectronic chips|
    EP17808100.6A| EP3538937B1|2016-11-14|2017-11-10|Method for the collective production of a plurality of optoelectronic chips|
    PCT/FR2017/053067| WO2018087485A1|2016-11-14|2017-11-10|Method for the collective production of a plurality of optoelectronic chips|
    CN201780082851.7A| CN110178064B|2016-11-14|2017-11-10|Method for collective production of a plurality of optoelectronic chips|
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