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    • 专利摘要:
    A method of manufacturing solar cells in germanium wafers is described, which involves thinning the back side of the wafer while maintaining a non-thinned area that supports it, and subsequently a conformation and chemical individualization of the cells. solar manufactured in the wafer without the need to use mechanical separation means, given the lesser thickness of said wafer before individualization. It is an easily scalable procedure, which allows working with wafers of low thickness, and therefore low weight, and to provide solar cells with any possible configuration, since there are no geometric limitations such as those associated with the use of saws for mechanical cutting. . (Machine-translation by Google Translate, not legally binding)
    公开号:ES2759280A1
    申请号:ES202030203
    申请日:2020-03-11
    公开日:2020-05-08
    发明作者:Hernandez Iván Lombardero；Baro Luís Cifuentes；Del Valle Carlos Algora
    申请人:Universidad Politecnica de Madrid；
    IPC主号:
    专利说明:

    [0001]
    [0002]
    [0003]
    [0004] OBJECT OF THE INVENTION
    [0005] The object of the present invention is framed in the sector of the manufacture of electronic devices in wafers of semiconductor material. More specifically, the process is oriented to the manufacture of photovoltaic solar cells in germanium wafers.
    [0006]
    [0007] According to the method of the invention, electronic devices of low thickness and therefore of low weight can be manufactured. Thus, the present invention is specially designed to be used in the manufacture of high quality solar cells for the space sector, where weight is a critical factor.
    [0008]
    [0009] TECHNICAL PROBLEM TO BE SOLVED AND BACKGROUND OF THE INVENTION
    [0010] Electronic devices are known from the state of the art, such as photovoltaic solar cells, which are manufactured on the wafers themselves of semiconductor material, which act as a substrate. The wafer may or may not be part of the PN junction (or NP interchangeably), although it is true that in certain materials, such as silicon or germanium, it is most common for the wafer to be part of the PN junction. However, if you want to have flexible or lighter solar cells, the usual method is to grow the PN junction without using the wafer and then separate it (to get rid of the weight and stiffness provided by the wafer). For this, a sacrificial layer is usually used between the wafer and the solar cell, so that this layer can be selectively attacked (that is, using a chemical attack that only attacks that particular layer) after the solar cell grows, thus separating it from the wafer. However, this is not feasible for all materials, especially in germanium or silicon cells. Solar cells have at least one front and one rear electrical contact to extract the electrical current. The front contact can be, for example, AuGe / Ni / Au, where the layers are deposited evaporating the mentioned materials. The rear contact is usually made up of Au usually.
    [0011]
    [0012] These wafers can be of a very diverse type of material (silicon, germanium ...) and are usually obtained from ingots of semiconductor material (generally these ingots are cylindrical bodies) by means of mechanical cutting. Subsequently, the wafers are They polish to obtain a flat surface on which epitaxial growths can be carried out (what is known as an epi-ready surface ).
    [0013]
    [0014] Among the materials used for the wafer, germanium is currently the most widely used in the manufacture of solar cells for space applications. But its excessive relative weight in the cell body, due to the need to use thick wafers, is a handicap. Indeed, the thickness of the wafer must be sufficient and meet certain conditions in its preparation to prevent it from breaking during the cutting and polishing processes. Generally, this thickness should be greater than 100 ^ m, and more preferably be between 150 ^ m and 300 ^ m, which ensures its strength to withstand subsequent treatments. Furthermore, as the size of the wafer radius increases, it becomes necessary to increase its thickness as well. For the manufacture of electronic devices in the wafers, such as solar cells, in which said wafer acts as a substrate, at least one of the faces of the wafer must be polished. Subsequently, the relevant semiconductor layers and the electrical contacts of each device are deposited. Finally, the manufactured devices are isolated from each other. First, they are electrically isolated by chemical attacks through which trenches of approximately 5 ^ m to 10 ^ m deep are made. Secondly, to carry out the complete separation, the wafer is mechanically cut in the area that has been chemically attacked, for example by means of a diamond saw. The reason the wafers are not cut directly with the diamond saw is that this cut could cause abrasion damage to the upper layers of the wafer, where the electronic device has been manufactured. These upper layers must have an extremely high quality, so it is necessary to carry out the aforementioned chemical attack to guarantee said quality.
    [0015]
    [0016] Thus, in the procedures of the state of the art, it is necessary to perform the separation cut of the cells in two steps, one of chemical cut and the other of mechanical cut. In addition, curved cuts cannot be made because the curve cannot be mechanically shaped with the saw, but chemical cuts have been developed that allow obtaining this type of curved surfaces.
    [0017]
    [0018] Nor could it be entirely substituted the mechanical cut by a chemical action since due to the thickness of the wafer, which as we have said is necessarily thick, a chemical attack in all its height to separate and individualize the photovoltaic cells This would lead to too high a lateral loss of material. This mechanical cut also causes problems in the efficiency of the cell manufacturing process, since the wasted area between them is high.
    [0019]
    [0020] Thus, one of the main problems is the thickness of the solar cell, since it must be thick for mechanical and manufacturing reasons, but all this surplus material impairs its performance. Said minimum thickness is determined by the wafer cutting process, while the thickness determines or influences the weight and efficiency. In this sense, the wafer in which the solar cell is manufactured represents more than 95% of the weight of the solar cell and a similar percentage of the thickness is equally unnecessary from the point of view of power generation.
    [0021]
    [0022] From the state of the art, for example, document US2011177675 is known, which proposes a method of separating semiconductor devices by chemical etching in silicon wafers. It includes a secondary stage of protection of the trench walls opened by a first chemical attack so that the separation can be carried out in several stages, not one. The lateral surfaces next to the semiconductor device are protected by means of a photolithographic stage that reveals only the bottom of the trench to carry out the separation by chemical attack. That is, a method is described that allows attacking a material vertically without attacking it laterally, based on an iterative process of protecting the side walls. This document cannot be used in the production of solar cells as it proposes a step of gluing an adhesive or "tape" to the front surface of the wafer to thin the substrate, which can degrade the final device by affecting capacity. light reception by said front surface of the solar cell. Another disadvantage is that the deposit of the rear electrical contact, which is essential for solar cells, cannot be done with this method since the devices suffer high temperatures during the process ( mainly during the processes of evaporation and alloying of the electrical contact), peeling off as a consequence of the tape or the temporary substrate in question. In our case, as we say, it would be necessary to evaporate the rear metal contact. If the cells stick to a tape, or to any other temporary carrier by means of an adhesive, to avoid its separation, this process is difficult since high temperatures are reached and they could detach.
    [0023] US2019080965 is also known, which describes how to combine a process of thinning silicon wafers with the previous isolation of the devices so that they are isolated from each other. The process poses relevant technical problems, since it includes a step of gluing the upper part of the wafer to a tape, with the corresponding problems that this can cause (degradation of the front surface, lack of resistance to certain high-temperature processes), to be able to subsequently thin the wafer. A technical problem associated with the described method is that it includes a step of attaching the wafer to a tape or other type of carrier element, but said step is carried out after thinning. The handling of the wafer already thinned for gluing on the tape is very complex and can cause, for example, the wafer to fracture. In this case, moreover, there is a need for chemicals that selectively attack the silicon. This method could not be used for the manufacture of solar cells because either the cells are completely separated from each other during the procedure or a tape would have to be provided on the front surface that would affect the quality of said front surface and, therefore, , at the amount of light absorbed. In this case, since the document is intended for the production of devices in silicon wafers, such as transistors or other electronic devices, placing the tape on the front surface is not a problem. In addition, in these devices it is not necessary to make the deposit of the rear contact, a step that is essential when manufacturing solar cells, which involves the same problems detailed for patent US2011177675 (high temperature processes prevent the use of a frontal clamping since the adhesive will not hold the temperature). Other inventions suffer from these same problems, such as those described in documents WO2015094863 and US6884717, which propose the protection of certain areas of the wafer to maintain a certain level of mechanical resistance when facing subsequent preparation treatments. The first of them discloses support structures but to carry out plasma-etch / ng processes. The second details the formation of the rear electrical contact of the cell via hole, that is, from the front face, and in very small sizes (mm2) of material.
    [0024]
    [0025] From the state of the art, document US6162702 is also known, which describes the use of structures on the back side of the wafer to increase its resistance.
    [0026]
    [0027] DESCRIPTION OF THE INVENTION
    [0028] The invention relates to a method of manufacturing electronic devices, more specifically solar cells, in germanium wafers, which involves a change in Important material with respect to most of the known procedures of the state of the art, in which silicon wafers are used, as their treatment is very different. This is a challenge, since in the development of the procedure, the limitations and requirements associated with the manufacture of solar cells must be considered, in addition to the nature of the material (high surface quality requirements so that they can absorb light correctly or deposit contacts) rear, which are made at high temperature, and must be alloyed, exceeding the temperature that can withstand the caps and other adhesives used in this type of procedure).
    [0029]
    [0030] The main object of the present invention consists of a manufacturing process for germanium wafer photovoltaic solar cells comprising the following steps: a) depositing a first protective layer or mask
    [0031] • over the entire surface of the front face of the germanium wafer, which has at least one (upper) layer of semiconductor material (deposited or grown on the wafer); and
    [0032] • on a part of the surface of the back face of the wafer,
    [0033] the order of both deposits being interchangeable;
    [0034] b) carry out a first chemical attack on the germanium on the back face of the wafer, to reduce the thickness of the wafer on the entire surface not protected by the protective layer;
    [0035] c) incorporate an electrical contact on the rear face of the wafer;
    [0036] d) removing the first layer of protection, both from the front and rear surfaces, and proceeding with an alloying action of said electrical contact;
    [0037] e) depositing a support (and fixing) substrate on the rear face of the wafer, configured to maintain the position of the solar cells during their forming process and prevent them from being uncontrollably released when they are separated; f) depositing a second protective layer on the front face of the wafer and defining the shape or body of the solar cells on said protective layer by means of a photolithographic process, in such a way that, between said bodies defined in the protective layer, a unprotected wafer surface that is at least twice the wafer thickness after the first chemical attack;
    [0038] g) performing a second selective chemical attack to attack the at least one upper layer of unprotected semiconductor material, without attacking the wafer;
    [0039] h) remove the remains of the second protective layer and deposit a third protective layer or mask that covers the previously defined upper surface with the second protective layer, including the sides of the previously defined cell bodies and part of the area of the semiconductor material layer that was exposed by the second chemical attack, so that the surface of the unprotected front face of the wafer that remains between said parts of the protective layer is less than the separation distance defined in the second protection layer and preferably in the vicinity of 2-7jm, more preferably being less than 5 | jm; and
    [0040] i) carry out a third chemical attack on the germanium of the wafer on the unprotected surface, in such a way that the cells are individualized and separated from each other, at the same time that they are fixed to the support substrate of the rear face.
    [0041]
    [0042] After this process, the rest of the protective layer that covers the surface of the cells is removed, leaving the cells ready for storage and use, solar cells whose wafer ratio (and weight) is significantly reduced.
    [0043]
    [0044] Before starting the described process, that is, before covering the front or rear surface with the first protective layer, the semiconductor layer or layers may have frontal electrical contacts on their upper surface. However, these electrical contacts, which must be protected and which are part of the solar cell, can also be deposited after the wafer thinning stage, or after this stage and before chemical attacks. Most preferably, these contacts are on the surface of the at least one semiconductor layer at the beginning of the process, because it is desirable that the wafer be handled as little as possible once its thickness has been reduced.
    [0045]
    [0046] Both the front and rear electrical contact are preferably composed of AuGe / Au or Au layers directly (AuGe are gold germanium alloys). These layers are preferably deposited by evaporating the mentioned materials on the semiconductor layers.
    [0047]
    [0048] As for the support substrate that is used to fix the back face of the wafer when the solar cells are individualized, it can be, for example, an adhesive tape of the type that loses adhesion under certain conditions (with heat, by illumination - at illuminate it with ultraviolet-, etc.) to be able to detach the solar cells after their manufacture. In the sector, the English term "tape" is commonly used to refer to this adhesive tape, and may also be called blue tape or dicing tape. increases the mechanical strength of the wafer assembly, which is vital to ensure that the following manufacturing steps can be properly performed without damaging the solar cells. In addition, the tape holds the cells together during their manufacture, avoiding "mixing without cell control" when the cell individualization cut is made. In many cases, the solution used for this type of process is to glue a front support, as mentioned in other bibliographic references, leading to the problems outlined above. The tape can be deposited 1) on the entire surface of the rear face of the wafer, that is, both on the thinned part and on the defined geometric structure that maintains the original thickness and acts as a support, or it can be 2) "trimmed" and adapted to said defined geometric support structure, in order to be deposited only in the thinned area (whose thickness has been reduced). In this last way, the geometric structure traced as a support on the wafer is loose, leaving a mixture of devices attached to different caps, in no order once separated. For this reason, it may be preferable to adhere the tape to the entire back face of the wafer, including the internal geometric structure configured to act as a support. On the other hand, it is important to highlight that if an internal geometric structure has been defined, it must be defined according to the solar cells defined on the front face. That is, the geometric shape where the thickness of the wafer is not thinned must necessarily be that area of the wafer where there are no defined solar cells on the front face.
    [0049]
    [0050] The procedure described allows working, after the first stages, with low-weight, low-thickness wafers. Despite being a thin wafer, you can work with it as if it were not, with conventional processes, which does not require the use of specific or adapted techniques. This occurs thanks to the fact that lower support structures are formed (on the back side of the wafer) to give greater mechanical resistance to the entire multilayer structure, thus facilitating the handling of thin wafers that are more flimsy to subsequent processes. Furthermore, the invention allows the cutting of the wafers by means of chemical attacks while maintaining a high use of the wafer. These chemical attacks are integrated among the rest of the chemical attacks that are carried out in a habitual procedure. This simplifies their manufacturing and avoids the degradation of the solar cells (since saw cutting is not used).
    [0051]
    [0052] Indeed, thanks to the proposed procedure, the use of mechanical abrasion techniques, such as polishing methods, which can affect the configuration of the cell, is avoided. In addition, the proposed chemical slimming attack is especially developed for the attack of germanium wafers, which are generally used in the manufacture of solar cells in the space field.
    [0053]
    [0054] With the present invention it is possible to reduce up to 85-90% the weight of the solar cells (if very thick wafers are assumed, such as, for example, about 250 ^ m thick, it reaches 90% reduction; in normal wafers of approximately 175 ^ m thick, the reductions obtained are 85%), which makes them especially interesting for use in such space applications. In addition, in recent years the market has evolved towards the manufacture and use of larger wafers to reduce costs. This makes it even more necessary to reduce the weight of the wafer since a wafer with a larger radius needs a greater thickness and, therefore, increasing the size would greatly increase the weight of the wafer.
    [0055]
    [0056] The proposed procedure allows to slim and separate solar cells that have been manufactured on the wafer itself. This fact is of great importance since the germanium cells manufactured in wafer are the ones that have reported the highest quality to date and are the ones that dominate the space market. In addition, the slimming process uses a chemical attack that does not need to be selective since it never comes into contact with anything other than the germanium wafer (except for the photoresin protection layer, the tape or temporary substrate , and the gold back contact, which are chemically inert). Therefore, any semiconductor layer can be grown on top of the wafer without compatibility problems with the chemical attack to be used. However, if it is necessary that the semiconductor layers grown on top of the germanium can be selectively attacked until reaching the germanium or, that the attack used for these layers does not generate residues that interfere with the subsequent attack made to cut the germanium wafer.
    [0057]
    [0058] The described procedure allows to control the chemical attack very well, therefore very short attacks can be made if desired (to reduce the thickness of the wafer very little), that is, the thickness of the wafer can be easily controlled and then individualize cells. The procedure is especially recommended to manufacture solar cells from wafers of a thickness of about 150 ^ m. This thickness can be reduced by the process to, for example, a thickness of about 20-30 ^ m of wafer. In wafers of smaller surface size, the thickness could be further reduced. This is because the wafers are not exactly the same thickness across their entire surface, This uncertainty determines the minimum thickness that can be achieved with the proposed thinning process.
    [0059]
    [0060] Thus, preferably, in step b), the thickness of the wafer is reduced to a thickness of less than 150 ^ m, more preferably to a thickness of between 20-30 ^ m. As already mentioned, the thickness of a solar cell must be very efficient, or what is the same: the smallest possible thickness that allows it to absorb all the necessary light. The present invention maximizes the efficiency of this parameter. Chemical attacks to cut the wafer are carried out on previously thinned wafers, so it is possible to reduce the lateral loss until it is very small. This is a further advantage in the field, since in state-of-the-art solutions in which chemical attacks are carried out on very thick wafers, without thinning (thickness greater than 150 microns), the loss of useful material in attacks side is very high and greatly reduces the use of the wafer.
    [0061]
    [0062] In short, the present invention allows working with large wafers (large radius) without the amount of said material in the cell obtained being excessive and reducing its efficiency, since it comprises at least one stage of thinning the wafer. In addition, the subsequent cut of the wafer is carried out by means of a chemical attack and not by means of mechanical cuts, so that the cut does not degrade the quality of the wafer at all and its thickness or brittleness no longer determines a minimum size necessary to avoid breaks in its handling.
    [0063]
    [0064] In a preferred embodiment, the first protective layer is a polymer layer, and more preferably it is a photoresin, which can be deposited on the surface of the semiconductor layer for example by spin-coating. With this method a small amount of photoresin is deposited on the wafer and it is rapidly rotated. The photoresin is liquid and spreads evenly over the entire front surface of the wafer when turned. For its part, the protection surface of the rear face of the wafer determines the area that is not going to be reduced or thinned, that is, the area that will retain the original thickness, serving as a support for the entire structure. This unreduced support can be in many different ways; that is, for example, it can be a perimeter ring in its simplest form or a predefined geometric structure (depending on the desired distribution of the cells), which may or may not be combined with the aforementioned perimeter ring or any other simple shape, in many different ways, not to mention any shape you want to establish (grid with squares, diamonds, irregular shapes ...). The technique of protecting the back face of the wafer is also more or less complex depending on whether it is necessary to make a pattern according to the shape of the support structure or if it is only necessary to cover the perimeter ring or a simple geometric shape (a cross, for example). In the first case, it is preferable to use a photolithographic process to make the pattern with great precision, whereas, if only the perimeter ring or another simple structure is protected, the resin can be applied directly to the corresponding area without the need for a photolithographic process. . Thus, in an embodiment, the area that is maintained with the original thickness of the wafer and whose thickness is not reduced with the first chemical attack on the germanium is the perimeter area of the wafer, that is, a perimeter ring-shaped support structure. In another embodiment, the perimeter zone of the wafer is not protected, but the original thickness of the wafer is maintained in an internal zone of geometric structure with a configuration to be determined, which depends on the number of electronic devices to be manufactured in the wafer and its size and distribution in it. In a third example, a combination of both supports can be carried out: the perimeter area of the wafer can be protected, as the first support area, and also an internal geometric structure (in the central area of the rear face of the wafer) , within the perimeter). In any case, it is most preferable that the perimeter area is always protected, since it gives lateral protection and support to the entire structure in an area that can be discarded later at the end of the manufacturing process without affecting the rest of the wafer .
    [0065]
    [0066] Thus, during the procedure, support structures are used, formed in the wafer itself, which may have a perimeter ring configuration and / or different configurations or internal geometric structures (for example, a mesh or grid) that extend on the back surface of the wafer (with a predefined pattern: cross-shaped, a homogeneous grid or even irregularly shaped.). Said support structures are formed by applying a protective layer on a posterior face of the wafer, with the pattern of the support structure to be "drawn" (for example, by means of illumination in photolithography). This protective layer thus determines the pattern of the shape of the supporting structures, and the thickness of the wafer is not modified in the protected areas despite being subjected to chemical attack.
    [0067] It is especially important to be able to control the shape of the internal patterns for large wafers, because these patterns ensure correct mechanical strength of the wafer when they are large. There are many complex geometry patterns that would be very difficult to perform using abrasive techniques (such as polishing) or even impossible to carry out. In the proposed procedure, the fact of providing protective structures in one way or another does not imply greater complexity or changes in the stages to be carried out.
    [0068]
    [0069] After step b) of thinning or reducing the thickness of the wafer, and depositing the rear electrical contact c), it is usual to remove the remains of the first protective layer that has been used to configure the support structure.
    [0070]
    [0071] Also preferably, the rear contact is incorporated in step c) by evaporation. This contact, after its incorporation and subsequent removal of the protection layer, undergoes an alloying step to improve its specific contact resistance and allow correct operation of the device. After the alloying process, the tape is added to the rear, step d), as previously specified (either internally to the configured geometric structure or to the perimeter ring, or even to the entire wafer assembly). Adhering the tape at this time is vital as it increases the mechanical strength of the wafer assembly. In addition, it serves to keep cells under control after they conform and once they are individualized.
    [0072]
    [0073] The following steps in the procedure, once the thickness has been reduced, are intended to configure and individualize the electronic devices (solar cells) using chemical attacks. That is, when the electronic devices have already been manufactured in the wafer and the wafer has been chemically thinned, a new chemical attack is carried out to cut the wafer by identifying the solar cells.
    [0074]
    [0075] The chemical attack for cutting wafers is generally not recommended for thicknesses greater than 100 ^ m. In this case, since the thickness of the wafer has already been reduced, the process of cutting by chemical etching is possible and is shorter than in the cases of the state of the art in which the use of chemical cuts is described. This allows to increase the use of the wafer since the lateral attack (the chemical attack does not attack only vertically, but also to the sides) is less as the time during which the chemical attack is carried out has been reduced. Therefore, less lateral attack allows Reduce the gap between the devices manufactured in the wafer and take advantage of the wafer more efficiently. In addition, as previously described, chemical attacks generate smooth and imperfection-free surfaces. In applications such as the manufacture of solar cells this allows obtaining solar cells with increased performance. Furthermore, as cell thickness is reduced, the quality of this surface has a greater impact on the final performance of the device.
    [0076]
    [0077] The second and third protective layers are also preferably made of polymer, and may be made of photoresin, like the first one, or of a different material. That is, the three protective layers can be of the same material or a different material, independently of each other.
    [0078]
    [0079] Thus, when the second chemical attack of the process is carried out once the second protective layer has been deposited on the surface of the wafer, and in which the cell shapes have been defined, it also laterally affects the parts of the semiconductor layer that remain under the protective layer. This lateral attack occurs in both directions (left and right), so for each micron of vertical attack there is one micron of attack in each direction in the lateral direction (assuming an isotropic attack). However, the thickness of these layers is usually very small, so the lateral attack is usually negligible with respect to the total area of the cell. Then, what is sought to achieve with the protection before the third attack is that said third attack never comes into contact with the upper layers of the solar cell despite the fact that a much thicker layer is being attacked and therefore the lateral attack will be much higher. However, having attacked a much wider area in the second attack, the third did not come into contact with the upper layers despite its greater lateral attack.
    [0080]
    [0081] As said, the separation between solar cells in the third protective layer is preferably between 2-7pm, more preferably being less than 5pm and more preferably still being between 3 and 5pm, the surface corresponding to the front surface of the wafer that is exposed and unprotected, ready to be attacked.
    [0082]
    [0083] Thanks to the use of two different protection patterns, the third chemical attack, which affects the germanium of the wafer on its front face until individualizing the solar cells, does not come into contact with the semiconductor upper layers of the same (the layers of semiconductor material and electrical contacts grown or deposited on the wafer) so that its quality is preserved.
    [0084]
    [0085] Preferably, the chemical agent used to attack germanium in the first chemical attack (rear) and in the third attack (cell separation) is H3PO4: H2O2: H2O in a ratio of 1: 6: 3. Although this type of attack has been reported to carry out chemical attacks on semiconductors, it has never been used to separate solar cells or attack such a large thickness of germanium. The maximum described in the literature has been an attack with a depth of 80 microns. Here the attack is over 150 microns, which is not obvious because other chemists capable of attacking a material with a thickness of tens of microns become useless for greater depths.
    [0086]
    [0087] Preferably, all chemical attacks are carried out at room temperature (25 ° C) as this minimizes the problems that may arise regarding the acceleration of said attacks. This temperature is also determined by the material chosen for the protective layers.
    [0088]
    [0089] When the support structure that has been defined on the back face of the wafer is removed during the early stages of the process, and also the upper protection layers of the cells once structured, the thinned and individualized solar cells are left, joined to the tape, ready to be used. Typically, thereafter, the solar cells are separated from the tape but this step is not essential because some areas of the rear electrical contact may already have been exposed after the attacks, allowing access to the rear electrical contact from the front.
    [0090]
    [0091] The process can be used with or without agitation in the chemical agent that is used in the attack, to avoid saturation, thus ensuring that the solution in contact with the semiconductor material has the appropriate proportions. However, no variations in attack speed have been observed with stirring, which allows the chemical attack to be carried out without stirring, thus simplifying the chemical attack and therefore the industrial application of the process.
    [0092]
    [0093] The keys to the present invention are reducing the thickness of the wafers to 20-30 microns while maintaining the original thickness in a support structure (generally a perimeter ring) that ensures strength. That is to say, a weight loss of the wafer to a thickness of less than 100 microns, even less than 85 microns, without danger of breaking the wafer. This is essential for the solar cell applications for which the invention is designed. Subsequently, the chemical separation is carried out guaranteeing the quality of the cut and maintaining the quality on the upper faces that make up the solar cells.
    [0094]
    [0095] BRIEF DESCRIPTION OF THE FIGURES
    [0096] To complete the description and in order to help a better understanding of the characteristics of the invention, this specification is attached, as an integral part thereof, to a set of drawings in which, by way of illustration and not limitation, it has been represented the next:
    [0097]
    [0098] Figures 1A-M represent the steps of the manufacturing process for solar cells in germanium wafers. The germanium wafer with the at least one top layer of semiconductor material has been represented throughout the different steps of the process. Thus, the different protective layers that are deposited on the wafer and / or on the upper layers of semiconductor material are also appreciated.
    [0099]
    [0100] The following is a list of the different elements represented in the figures that make up the invention:
    [0101] 1. Germanium wafer
    [0102] 2. Upper layers of semiconductor material with front electrical contacts in this embodiment
    [0103] 3. First protective layer
    [0104] 4. Rear contact
    [0105] 5. Fixing substrate: Adhesive tape
    [0106] 6. Second protective layer
    [0107] 7. Elevations or remnant of semiconductor layer (s) deposited on the wafer after the first chemical attack.
    [0108] 8. Third protective layer
    [0109]
    [0110] 1A) A germanium wafer is shown (white rectangle) with a semiconductor structure grown on top and the front contact already deposited (black rectangle). The front contacts can be post deposited but in this preferred fabrication example, they are deposited prior to weight loss to reduce the handling of the thinned wafer as much as possible.
    [0111] IB) Front protection tank (lined rectangle)
    [0112] IC) Rear protection tank (lined rectangle) - steps 1B and 1C are interchangeable
    [0113] ID) First chemical attack for thinning of the germanium wafer
    [0114] IE) Incorporation of the rear contact (white rectangle) by evaporation.
    [0115] IF) Cleaning of the protection areas and rear alloying of the rear contact
    [0116] IG) Deposit of the support and fixing substrate, such as a tape (black rectangle)
    [0117] IH) Protection of the front face where the cells have been manufactured with the second protection layer (for practical purposes where the front electrical contacts have been previously deposited). For this, it has been considered that the minimum distance to be left between devices (which will be similar to the width of the unprotected area in this second front protection layer) is at least twice the thickness of the thinned wafer.
    [0118] II) Second chemical attack, of the upper layers selectively
    [0119] IJ) Cleaning the second layer of protection
    [0120] IK) Deposit of the third layer of protection (this time leaving a minimum thickness, around 5 ^ m)
    [0121] IL) Third chemical attack, of the germanium wafer
    [0122] IM) Cleaning of the protection layer and removal of the perimeter ring
    [0123]
    [0124] Figure 2 shows the incidence of temperature on the speed of chemical attacks. The circles represent the measurements taken, and the line represents the adjustment of these measurements (y = a * 10b * x). As can be seen, the process accelerates exponentially (the Y axis is on a logarithmic scale), which allows reducing the time required of the attack. However, in practice, the attack treatment cannot be brought to any temperature because a degradation of the materials can occur, such as photoresin, which is a polymer. It was found that after half an hour (at very high temperature) the photoresin has degraded and the front face is no longer protected.
    [0125]
    [0126] DETAILED DESCRIPTION
    [0127] If the scheme defined in Figures 1A to 1M is followed, it is observed that in the first step A1) the initial structure of a germanium wafer (1) is represented, represented in white, with a thickness of 175 microns, on which the semiconductor material layer (2), in black color, is deposited. In the second image 1B), which corresponds to step a) of the process object of the present invention, a first protective layer (3) of resin is deposited, by means of a striped rectangle, on the entire upper surface of the semiconductor layer (2). Thus, in image 1C) the second part of stage a) is represented, where the first protective layer is deposited on the part of the rear face of the wafer where it is desired to maintain the support or structure. Subsequently, in figure ID) the first chemical attack is carried out on the rear face of the wafer (1) to reduce or thin its thickness, with H3PO4: H2O2: H2O. The result is a thinned wafer (1) of reduced thickness up to 20-30 microns, where a non-thinned perimeter ring of the wafer (1) remains, which acts as a support in the later phases, represented here as legs. After this chemical attack, a double action is carried out, corresponding to stages c) and d) of the process and shown in images IE) to 1H): first, it is incorporated on the rear face of the wafer that has the rear electrical contact (4) has been thinned, the protective layer (3) is removed and said rear electrical contact (4) is alloyed, and then a fixing substrate (5) is added, which is an adhesive or tape. Second, a second protective layer (6) is deposited on the surface of the semiconductor layers and the shape of the cells in the protective layer (3) that covers the semiconductor layer (2) is defined by a photolithographic process; This is done by removing the part of the protective layer (3) from the part where no solar cell is to be constituted and, in turn, leaving said protective layer (3) in the part where the solar cell is to be constituted. In this way, the following step d) can be carried out, shown in Figure 1I), in which the part of the semiconductor layer (2) that is not protected by the protective layer ( 6), but never the germanium wafer underneath. This attack, which involves carrying out a series of chemical attacks (as many as necessary) to attack the layers grown on top of the germanium wafer (1), corresponds to what is commonly known as a table attack (electrically separates the devices ). In this way, the parts or bodies (7) of the semiconductor layer are molded on the wafer that will constitute the structure of the cells; they can have various shapes, such as they can be trapezoidal, because the area of the semiconductor layer (2) between protected areas is eliminated and, therefore, it laterally attacks said protected parts. In figure 1J) the remains of the protective layer (6) are removed, before depositing the third protective layer (8). In this case, when dealing with elevations or mounds, the protection is not only from its upper surface, where the electrical contacts are, but also laterally, completely covering them and leaving a narrow space between them defined by a photolithographic process. The new chemical attack is carried out on the unprotected germanium wafer part (1). This attack is carried out with the corresponding chemical, and may be H3PO4: H2O2: H2O or another designed for this purpose.
    [0128] The first and third attacks (those used to thin the germanium wafer and make its "cut" or individualization, respectively) do not need to be selective attacks. The first attack ends before the wafer is completely removed, so in no At the moment it is in contact with any other material that is not germanium and therefore it is not necessary for it to be selective.The third attack ends in the rear contact, gold in this embodiment, so it is not necessary for the attack to be selective either. Gold is a very chemically inert material so there are no corrosion problems. In any case, even if that gold is damaged, the part of gold that actually contacts the solar cell is protected by the solar cell itself so it is not a problem either This applies not only to this exemplary embodiment, but to all variants of the invention, since they are general questions of the process.
    [0129]
    [0130] In this example of embodiment, where a wafer is reduced from 175 ^ m thick to 30 ^ m thick, the weight per unit area goes from 93.1 mg / cm2 to 10.6 mg / cm2.
    权利要求:
    Claims (10)
    [1]
    1.- A manufacturing process for germanium wafer photovoltaic solar cells that comprises the following steps:
    a) deposit a first protective layer
    • over the entire surface of the front face of the germanium wafer, which has at least one layer of semiconductor material; and
    • on a part of the surface of the back face of the wafer,
    the order of both deposits being interchangeable;
    b) carry out a first chemical attack on the germanium on the back face of the wafer, to reduce the thickness of the wafer on the entire surface not protected by the protective layer;
    c) incorporate an electrical contact on the rear face of the wafer;
    d) removing the first layer of protection, both from the front and rear surfaces, and proceeding with an alloying action of said electrical contact;
    e) depositing a support substrate on the rear face of the wafer, configured to maintain the position of the solar cells during their shaping process and prevent them from being uncontrollably released when they are separated;
    f) depositing a second protective layer on the front face of the wafer and defining the shape or body of the solar cells on said protective layer by means of a photolithographic process, in such a way that, between said bodies defined in the protective layer, a unprotected wafer surface that is at least twice the wafer thickness after the first chemical attack;
    g) performing a second selective chemical attack to attack the at least one upper layer of unprotected semiconductor material, without attacking the wafer;
    h) removing the remains of the second protective layer and depositing a third protective layer that covers the previously defined upper surface with the second protective layer, including the sides of the previously defined cell bodies and part of the area of the semiconductor material layer which is exposed with the second chemical attack, so that the surface of the unprotected front face of the wafer remaining between said parts of the protective layer is less than the separation distance defined in the second protective layer; and
    i) carry out a third chemical attack on the germanium of the wafer on the unprotected surface, in such a way that the cells are individualized and separated from each other, at the same time that they are fixed to the support substrate of the rear face.
    [2]
    2. The process of claim 1, wherein frontal electrical contacts are deposited on the surface of the semiconductor layer or layers, either before covering the rear surface with the first protective layer, or after the first thickness reduction chemical attack of the wafer, or after this stage and before the rest of chemical attacks.
    [3]
    3. The process according to any one of claims 1 or 2, wherein the support substrate is an adhesive tape of the type that loses adhesion under certain conditions.
    [4]
    The process according to any one of claims 1 to 3, wherein the adhesive tape is deposited in one of the following ways: 1) on the entire back face of the wafer, including the part where the thickness has been reduced as in the support as in which remains with the original thickness; or 2) only where the original thickness of the wafer is reduced.
    [5]
    5. The process according to any one of claims 1 to 4, wherein the thickness of the wafer is reduced below 85 microns.
    [6]
    The process according to any one of claims 1 to 5, wherein the first, second and third protective layers are polymer layers, the same or different from each other.
    [7]
    7. The process according to any one of claims 1 to 6, wherein the part of the wafer that is maintained with its original thickness acting as a support has one of the forms selected from the group consisting of: a perimeter ring around the rear face of the wafer; a regular or irregular pattern geometric structure; and a combination of the perimeter ring with a regular or irregular pattern geometric structure.
    [8]
    8. The process according to any one of claims 1 to 7, wherein the rear contact is incorporated in step c) by evaporation.
    [9]
    9. The process according to any one of claims 1 to 8, wherein the unprotected areas in the third protective layer have a width of less than 5 ^ m, surface that is exposed and unprotected, ready to be attacked.
    [10]
    The process according to any one of claims 1 to 9, where the chemical agent used to attack germanium in the first chemical attack on the back side of the wafer and in the third attack where the cells are individualized) is H3PO4: H2O2 : H2O, in a ratio of 1: 6: 3.
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    同族专利:
    公开号 | 公开日
    ES2759280B2|2020-09-24|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    WO2015002725A1|2013-07-02|2015-01-08|Applied Materials, Inc.|Laser scribing and plasma etch for high die break strength and smooth sidewall|
    US20150024606A1|2013-07-17|2015-01-22|Taiwan Semiconductor Manufacturing Co., Ltd.|Method and system for thinning wafer thereof|
    US20180182670A1|2016-12-28|2018-06-28|Canon Kabushiki Kaisha|Semiconductor apparatus, method of manufacturing the same, and equipment|
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