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    • 专利摘要:
    The invention relates to a measuring circuit facilitating monitoring of a voltage of a semiconductor switch, the measuring circuit comprises a plurality of measuring cells, wherein each of the measuring cells comprises at least one normally-on field-effect transistor, wherein each of the normally- on field-effect transistors are controlled by a gate signal from a resistor connected in series with the source connection of the normally-on field-effect transistor, and wherein a plurality of measuring cells are connected in series with the first end of the series connected measuring cells electrically connected to a terminal of the semiconductor switch and with the second end of the series connected measuring cells electrically connected to an analoge processing circuitry.
    公开号:DK201770767A1
    申请号:DKP201770767
    申请日:2017-10-10
    公开日:2018-04-23
    发明作者:Bjørn Rannestad；Søren Jørgensen
    申请人:Kk Wind Solutions As；
    IPC主号:
    专利说明:

    Semiconductor switch measuring circuit Field of the invention
    The invention relates to a measuring circuit for monitoring of a voltage of a semiconductor switch.
    Background of the invention
    Semiconductor switches are used in a wide range of applications in various variant and at variant voltages and currents. One example is power semiconductor switches used in power converters for converting a current generated from e.g. a wind turbine to comply with specific grid codes of the grid to which the wind turbine is connected.
    It is known that the voltage across the semiconductor swtich can be related to e.g. temperature and end of lifetime of the semiconductor swtich. This is disclosed e.g. in EP2753903 and EP2724I70. However, as also disclosed in these prior art documets, this voltage is difficult to measure.
    Brief description of the invention
    The invention related to a measuring circuit 1 facilitating monitoring of a voltage of a semiconductor switch, the measuring circuit 1 comprises a plurality of measuring cells, wherein each of the measuring cells comprises at least one normally-on field-effect transistor, wherein each of the normally-on field-effect transistors are control led by a gate signal from a control resistor connected in series with the source connection of the normally-on field-effect transistor, and wherein a plurality of measuring cells are connected in series with the first end of the series connected measuring cells electrically connected to a terminal of the semiconductor switch and w ith the second end of the series connected measuring cells electrically connected to an analoge processing circuitry'.
    The measuring circuit is advantages in that it has the effect that it facilitates measuring of voltage over any type of semiconductor switch including but not limited to IGBT, FETs, etc. controlled at any level of voltage or current and conducting any level of current.
    Further, the general principles of the measuring circuit have the effect that due to the flexible design (series connection of a plurality of measuring cells) it can be used for measuring any voltage (in principle infinite) over the semiconductor switches.
    The use of normally-on Field-Effect Transistors (FET; Field-Effect Transistor) is advantages in that it has the effect that the FET is “on” (conducting current) when no voltage is applied to the gate terminal of the FET.
    The measuring circuit is further advantages in that the gate voltage controlling the FET of the measuring cell is controlled by a control resistor connected to the source terminal of the FET. This has the effect that gate voltage of the FET is proportional to the c urrent of the source terminal and thereby is obtained a self-controlling mechanism of the FET current.
    It should be mentioned, that as an alternative to the normally-on. FET a normally-off FET with gate bias so that the normally-off FET acts as a normally-on FET may also be used.
    Terminal of a semiconductor swtich should be understood as a either gate, collector or emitter in case the semiconductor switch is an IGBT. A measuring circuit can be coimecte to one or more termninals of the semiconductor swtich.
    According to an embodiment of the invtion, the analoge processing circuitry comprising at least one of the list comprising: operational amplifier, instrumental amplifier, analog buffer, analog filter, analog multiplexer, analog to ditigal converter, voltage clamp.
    According to an embodiment of the invtion, a Zener diode having a breakdown voltage lower that the blocking voltage of the normally-on field-effect transistor is connected in parallel to the normally-on field -effect transistor of the measuring cell.
    This is advantages in that it has the effect that the Zener diode will lead the current through the measuring cell when the voltage over the field-effect transistor reaches the breakdown voltage and thereby protecting the field-effect transistor by preventing this current from being conducted by the field-effect transistor.
    According to an embodimen t of the invtion, the normally-on field-effect transistor of the measuring cell is an avalanche rated depletion mode field-effect transistor.
    This is advantageous in that it has the effect that this type of field-effect transistors is designed to conduct high currents and therefore the Zener diode can be avoided in the design of the measuring cell if the field-effect transistor hereof is an avalanche rated depletion mode type field-effect transistor.
    According to an embodiment of the invtion, the measuring ceil further comprises a protection resistor connected to the gate terminal of the normaily-on field-effect transistor.
    This is advantages in that it has the effect that it protects the gate terminal of the normally-on field-effect transistor during voltage transient (dv/dt) caused by switching of semiconductor switch.
    According to an embodiment of the invtion, wherein the measuring cell further comprises a diode for blocking current in the forward direction of the Zener diode.
    This is advantages in that it has the effect that charge is not buit up in the Zener diode during negative Vce-on, which may slow down response of the mosfet circuitry.
    According to an embodiment of the invtion, the normally-on field-effect transistor of the measuring circuitry is controlled by a self-controlled gate drive circuitry comprising a series resistor between the source terminal and the gate terminal of the normally-on field-effect transistor.
    According to an embodiment of the invtion, wherein the measuring circuit further comprises an analogue to digital converter, wherein the second end of the series connected measuring cells is connected to the analogue to digital converter.
    This is advantageous in that it has the effect that the measured voltage is converted to a digital signal for use in a digital control and. / or monitoring system controlling and / or monitoring the semiconductor switch. An example is monitoring the collector / emitter voltage of a semiconductor switch (if implemented as an IGBT), temperature of the semiconductor switch, etc.
    According to an embodiment of the invtion, the measuring circuit further comprises a clamping circuit limiting the input voltage of the analogue to digital converter.
    This is advantages in that it has the effect that when a switch the voltage across which is to be measured is high e.g. above 500V, the voltage at the analogue to digital converter is limited to the clamping voltage. As an example can be mentioned that if the voltage across a power switch is measured while the power switch conducts current (Vce-on) the voltage is typically low e.g. 1.5V. When the power switch is not conducting, the voltage (Vce-off) is typically high e.g. 110QV. Accordingly, by introducing a clamping circuit the clamping voltage of which is 5 V in both states the voltage at the analogue to digital converter will maximum be 5 V.
    According to an embodiment of the invtion, a current sensor is measuring output current of the semiconductor switch.
    This is advantages in the it has the effect that together with the Vce measuring, the current can be used to estimate state of h ealth, temperature, etc. of the semiconductor swtich.
    Measuring both the output current and Vce-on is advantages in that it has the effect that the offset in the current sensor can be determined. Hence, by knowledge of when Vce-on changes operational sign (here should be understood in the semiconductor switch i.e. from diode to IGBT in e.g. a top 1GBT). When the operational sign changes the current has passed through zero which can be used to determine the offset of the current sensor.
    According to an embodiment of the invtion, the measuring circuit can be configured as single ended or as differential mode.
    By single ended should be understood that a measuring circuit is connected from collector or emitter of the IGBT (semiconductor swtich). This configuration is advantages in that it has the effect it is a simple desing.
    By differential mode should be understood that a measuring circuit is connected from collector and emitter of the IGBT (semiconductor swtich). This configuration is advantages in that it has the effect that it balances the measuring crictuits and less critical to reference potential.
    According to an embodiment of the invtion, a top semiconductor switch and a bottom semiconductor switch is connected in a half-bridge configuration, wherein a first measuring circuit is measuring the voltage over the top semiconductor switch and a second measuring circuit is measuring the voltage of the bottom semiconductor switch, wherein one end of each of the first and second measuring circuits are connected to a multiplexer, wherein the multiplexer is connected to an analogue to digital converter
    This is advantageous in that it has the effect that only one analogue to digital converter is needed for digitalisation of voltage measurements of twro semiconductor switches.
    According to an embodiment of the invtion, a comparator circuit detects whether Vce-on top or Vce-on bottom is active and wherein an analog multiplexer is controlled by the comparator signal.
    The is advantegeosu in that it has the effect that the number of input channels of the ADC can be reduced
    According to an embodiment of the invtion, the measuring cell is implemented in a converter monitoring unit, facilitating monitoring a voltage over a top power switch and a bottom power switch of a semiconductor power switch pair, which is part of the current path through an inverter in a back-to-back converter connecting a power generating device to a public power grid.
    Figures
    The invention will be explained in further detail below with reference to the figures of which:
    Figure 1 illustrates a measuring circuit comprising two measuring cells,
    Figrue 2 A illustrates a measuring circuit com prising a plura lity of measuring cells Figure 2B illustrates measuring cells comprising voltage limiting Zener diodes, Figure 3 illustrats measuring circuits monitoring semiconductor switches in a half-bridge configuration
    Figure 4 illustrates measuring circuits in combination with bridge state comparators,
    Figure 5 illustrates timing in switching time of top and bottom semiconductor switches, and
    Figure 6 illustrates an example of implementation of the measuring circuit. Detailed description of the invention
    The invention will be explained in further detail with reference to the drawings which can be combined in any way and with reference to various non-limiting examples and embodiments as it will be explained in the following.
    Figure 1 illustrates a semiconductor switch 5 control by a gate drive 10 circuit having a voltage across the top and bottom terminal. The semiconductor switch 5 may he of any type including an IGBT. In the following an IGBT will be used as reference to a semiconductor switch 5 such as e.g. IGBT, diode, MosFet based on silicon, SiC, GaN or other semiconductor materials.
    Accordingly, the top terminal is referred to as collector and the bottom terminal is referred to as emitter. Hence, the voltage across the IGBT is referred to as collector / emitter voltage - Vce. When the IGBT is ON, current is allowed to pass through the IGBT from collector to emitter and when the IGBT is OFF, no current flow's through the IGBT. Accordingly, the Vce-on is the voltage aecros the IGBT in the ON state and Vcc-off is the voltage across the IGBT in the OFF state. The main purpose of the measuring circuit 1 of the present invention is to measure the voltage across the IGBT in the ON state which is also why it is also sometimes referred to as Vce-on measuring circuit 1,
    In parallel to the IGBT, a measuring circuit 1 is disclosed winch for simplifying the description of the invention is illustrated to comprise only twro measuring cells 2. However, it is noted that the line between the two measuring cells 2 indicates that the measuring circuit 1 may comprise or preferably comprises a plurality of measureing cells as will be described below.
    The measuring circuit 1 may be implemented as part of the gate driver 10 for the semiconductor and it may be communicating with what is referred to below as a main unit 6.
    The Vce-on signal from the measuring circuit 1 is preferably provided to an analog to digital converter (Analog to Digital Converter; ADC) 13. In this way, the Vce-on signal, is ready for use in a microprocessor 17 which may be part of a main unit 6 for control and monitoring of the semiconductor switch 5.
    The Vce-on measurement circuitry can be based on a depletion mode mosfet circuitry (or j-fet) with self-controlled gate drive circuitry. An example of a basic depletion mode mosfet circuitry is illustrated in figure 2. The measuring circuitry 1 of figure 2 may also be made as a differential circuitry with either exact same circuitry' to other branch or by adding a protection resistor with same value as resistors in MosFet circuitry.
    According to an embodiment of the invention, the Vce-on measurement circuitry may comprise of: Normally-on mosfets, j-fet or equivalent (depletion mode mosfet, J-fet etc.) including wide bandgap devices such as SiC and GaN commonly denoted 3. As an alternative to normally-on mosfet (or equivalent) one can use normally-off mosfet with gate bias so that the normally-off mosfet acts as a normally-on mosfet.
    Further, the Vce-on measurement circuitry 1 may be controlled by a gate control which is performed by means of gate connected to series resistor (4) at source connection.
    The circuit can be configured as one or more series connected cells as illustrated in figure 2 where a cell comprising of minimum a mosfet 3 and a control resistor 4 connected to the source of the mosfet 3.
    The Zener diode 8 illustrated on figure 2A or 2B may not be required in a single-cell arrangement.
    One may choose to add a gate prelection resistor 7 for protection of gate (optional), refered to as protection resistor 7 on figure 2A and 2B.
    Voltage division between series connected mosfets 3 (measuring cells 2) may be performed by means of zener diodes 8 or equivalent. Alternatively, voltage division can be performed by using avalanche rated depletion mosfets 3 (or equivalent) in this way the zener diodes 8 may not be required.
    In order to block current in forward direction of zener diodes 8, a blocking diode 9 may be introduced. A blocking diode 9 is illustrated on figure 2A in only one of the series connected measuring cells 2, however it is preferred that it is included in all the cells. As indicated on figure 1, a plurality of celles 2 are connected in series, which is illustrated on figure 2A. The end C2 refers to collector of high side switch 5 og two switches 5 in a half bridge configuration. El is the emitter of the low side switch 5 and Vce high and Vce low are the “output” of the series connected cells 2.
    Series resistance for the whole circuitry can be added to control impedance during forward reco very of power diode(s). A clamping circuitry comprising diodes and a DC-voltage can be used to limit the input voltage to ADC. This is especially relevant when the semiconductor is in the OFF mode.
    The circuitry can be configured as single ended or differential mode. Single mode should be understood as when one measuring circuit 1 is connected to one of collector or emitter terminal of the IGBT. Following, differential mode should be understood as when one measucing circui t is connected to each of the col lector and emi tter terminal of the IGBT.
    Beside the protection resitor illustrated on the gate of the mosFET 3, the difference between figure 1 and figures 2A, 2B is the Zener diode 8. The protection resistor 7 is as mentioned optional and the use of it depends on type of mosFet and semiconductor switch 5 to be measured.
    It should be metioned, that the analog processing circuitry 18 illustarted on figure 1 and 2b may refer to either the collector or emitter terminal of the switch 5 depending which of the terminals the measuring circuit 1 is connected to.
    The properties of the Zener diode 8 i.e. the avalance effect when the voltage across the Zener diode 8 reaches the breakdown voltage may as mentioned be comprised by the mosFet 3 if a socalled avalanche rated depletion mosfets 3 is used. In case such mosFETs 3 are used in the measuring cells 2, the Zener diodes 8 are superfluous.
    The Vce-on signals come preferably in pairs. For each sub-IGBT (a half-bridge configureation comprise two sub-IGBTs) there must be a Vce-on top and a Vce-on bottom measurement (if not only the Vce-on of one of the sub-IGBTs is measured). During operation (of two semiconductor switches in a half-bridge configuration) there are three states of operation: • Vce-on top is active. Vce-on bottom is invalid, meaning it is clamped to negative rail (i.e. DC-) • Vce-on bottom is active. Vce-on top is invalid, meaning it is clamped to positive rail (i.e. DC+) • Both Vce-on top and bottom are invalid. Top clamped to positive rail, bottom to negative rail
    Due to this nature of the circuitry an external analog multiplexer 14 may be used to reduce the number of input signals to the ADC, this is illustrated on figure 3.
    By an appropriate comparator circuitry, one may detect which mode is valid. Such comparatore circuitry may comprise a comparator for each measuring circuit 1. The comparators are connected to a micro processor 17 of either measuring circuit 1 or a main unit 6 located externally to the measuring circuit 1. Such comparator circuitry is illustrated in figure 4.
    The output of the comparator circui try may also control the analog mul tiplexer 14.
    The output of the comparator may also be used to detect timing of the PWMs and tell the microprocessor 17 which mode the Vce-on circuitry is in (digital input).
    Semiconductor switches 5 (i.e. e.g. IGBTs) of an inverter operates at a relative high frequence while the system current will be preferably 50/60 Hz or lower.
    The current flows ether through the collector / emitter of IGBT transistor 5 or through the avalanche diode inside the IGBT. This may be detected by the Vce-on voltage:
    When the voltage at Vce-on is positive, the IGBT transistor 5 conducts current and when the Vce-on is negative, the avalanche diode conducts current.
    To be able to calculate when the inverter current goes through zero, time capture input on the processor can be used giving the possibility to measure the relative time difference between the signals.
    Preferred signals for this calculation are: - Vce-on comparator, Top - Vce-on comparator, Bottom - Bridge state (Vce-off), Top --- Bridge state (Vce-off), Bottom
    Preferably these signals are connected to 4 different capture inputs on the processor. This is illustrated on figure 4, where the microprocessor 17 and the main unit 6 is illustrated as two separate units. However, it should be metioned that the microprocessor 17 is preferably part, of either the measuring circuit 1 or the main unit 6.
    For measuring the curren t output of the power module (i.e, e.g. of tv/o IGBTs in a halfbridge configuration) a Rogowski sensor may be used.
    The intelligent measuring board 19 i.e. the measuring circuit 1, microprocessor, multiplexer, ADC 13 and / or main unit 6 is preferably designed to receive input for a current sensor 21 such as the Rogowski sensor see figure 4,
    Two signals form this input may be implemented and connected to the ADC: 1. Analog integrator circuit where the output is connected to the ADC.
    2. Direct interface - Input signal connected directly to the ADC
    The signal may go through a pre-amplifier where the gain and DC offset can be adjusted by replacing resistors. To this comes an anti-aliasing filter before connected to the ADC input. The filter fo vil be about 1 MHz. 2. ordens filter required (Bessel filter). IGBT voltage zero cross and dutycycle measurement (Bridge state). An IGBT voltage detection circuit may be implemented to detect when the IGBT shifts from the top IGBT to the bottom IGBT and back. It may result in a comparator output, shifting high when Vce-off voltage is above a voltage level.
    The signal may be routed into a time/capture input on the microprocessor, giving the possibility to measure the period and dutycycle time. Preferably the following specification are met by the measuring circuit 1 Vce-off voltage comparator level: 73 Vdc±2V Maximum zero cross detection delay: 25 nS max.
    Tolerance on zero detection delay @2500 hz: 1%
    Note that also a signal for the Vce-off bottom signal may be available see figure 4.
    The comparator output signals bridge-state top and bridge-state bottom may be connected to a processor, which detects timing of such events (capture input). By subtracting the time instants of top and bottom comparators, one may detect the voltage switch timing (related to voltage dv/dt) of the switching of the IGBT (turn-on or turn off). This parameter can be used to calculate junction temperature of the IGBT or diode.
    Figure 5 iliustartes the timing of the top and bottom bridge state comparator signals. It should be noted, that in this example, the Vee-off signal is clamped to 4.7V by a clamping circuit such as the one illustrated on figure 2A.
    The voltage switching time is in the illustrated exampled found by subtracting time T2 from Tl, time T4 from T3 or Time T6 from T5.
    Accoding to an embodiment of the invention, the comparators, multiplexer, data processor, ADC, etc. may be implemented on a so-called measuring board 19. Figure 6 illustrates an example of such measuring board 19 and besides the above, the measuring board 19 may facilitate the following features either due to data processing of received data from the measuring circuit 1 and / or due to additional elements / circuits such as:
    Phase current measuring e.g. via one or more Rogowski coils Leakage current detection of the IGBT / diode of the power stacks Circuitry facilitating measuring leakage current Current (I) clamp measurement circuitry
    Circuitry for measurement of on-state collector-emitter voltage (Vce-on) Circuitry for measurement of off-state collector-emitter voltage (Vce-off) Circui try for detection of switch timing of IGBT (transition from Vce-off to Vce-on and vice versa)
    Circuitry for detection of PWM timing
    Circuitry for detection of zero-crossing of Vce-on signal
    Circuitry for peak detection of Vce-off
    Circuitry for peak detection of Voltage to ground
    Circuitry for measurement of vol tage to ground (common mode voltage) (Not implemented in existing 1MB)
    Circuitry for measurement of current to ground (common mode current) (Not implemented in existing IMB)
    Circuitry for measurement of terminal (busbar) voltage drop (current measurement by means using existing copper bars/cables)
    Circuitry for measuring terminal temperature Circuitry' for measuring air temperature
    It should be mentioned that the interface for the Rogowski based measurements may preferably be separated in at least two interfaces. The first Rogowski interface may facilitate handling of raw data which may be stored and / or processed by the data processor and the data storage respectively. The second Rogowski interface may comprise an analog integrator for handling the measurements from the Rogowski coil.
    The measuring boards 19 is preferably all communicating to a main unit 6. The main unit 6 preferably' comprise a data storage, data processor and data communication interface 14. The data communication interface 14 facilitates connecting the main unit 6 to a data communication network 15 such as the internet and thereby access to the main unit 6 may be created from every location in the world 16 having internet access.
    The main unit 6 may facilitate the following features:
    Present raw data from the IGBT measuring hoard 19 Present processed data from the IGBT measuring board 19 Communicate with and protect the converter e.g. stop, derate and / or operate e.g. if measured data or processed data indicate a need hereof. The data may be measured / processed in the converter, main unit, IGBT measuring board, a computer, or other relevant places.
    The main unit 6 may communicate with the measuring board 19 w'hich may be part of a converter monitoring unit. Preferably the main unit 6 facilitates at least one kind of data processing including passing data one e.g, with or without storing (e.g. temporary) such data.
    As mentioned above, the measuring circuit 1 is advantages to implement as part of a Converter Monitoring Unit (Converter Monitoring Unig; CMU) which will enable condition monitoring of wind turbine converters. Reducing the cost of corrective maintenance by means of condition moni toring is seen as a way of lowering Operation & Maintenance (O&M) costs for wind turbine systems. No condition monitoring systems for converters are commercially available. Based on wind turbine converter field failure analysis it is concluded that the CMU must be able to detect a broad range of failure modes related to semiconductor devices 5 of power modules such as Insulated Gate Bipolar Transistor (IGBT) power modules and associated gate drives 10. IGBT collector-emitter on-state voltage (vceon) is sampled in the CMU and used for detection of emerging failures. Preferably the CMU can be retrofitted an existing offshore wind turbine. The CMU will have negligible impact on the operation of the converter, but the retrofit approach introduces an unwanted measurement voltage drop due to parasitic inductance, compared to a CMU designed as an embedded part of the converter. A compensation strategy for the inductive voltage drop is proposed below as well as experimental results obtained on a prototype CMU. Experimentally the vce(m dependency to IGBT junction temperature and deterioration of gate drive voltage is discussed. The proposed method shows a good detectability of both thermal related degradations of the power module and degradation of gate drive voltage. It is also expected that the proposed method will enable detectability of other failure mechanisms.
    The present invention presents a new invention converter condition monitoring system. The condition monitoring system may be implemented as retrofit or an embedded part of newr converter designs.
    In order to interpret the vce»n signal by means of e.g. calculation of lj, an indication of the corresponding current is required. A Rogowski current sensor 21 which is very practical to retrofit, but have some drawbacks compared to e.g. closed-loop hall-effect current transducers may be used. The drawbacks of the Rogowski current sensor 21 include no DC current measurement and potential low frequency phase delays in sensor circuitry.
    The Rogowski sensor is only used to calculate RMS current and for performing the inductive voltage drop compensation strategy described previously. The test current according to table 2 corresponds to the current associated with maximum powder of a wind turbine.
    The basic technical specification for a Converter Monitoring Unit (CMU) which can be retrofitted in a converter of a wind turbine according to an embodiment of the invention will now be described.
    According to this embodiment, each power module of the converter consists of four parallel IGBT modules. Each IGBT sub-module will not conduct the current equally, meaning that the Vce-on signals and current signals will differ between sub-modules.
    In order to measure the total current through the power module an external Rogowski coil may be used. If the Rogow ski coil is used it needs an integrator in order to detect the current. The integrator may be implemented both as a digital version and as an analog version. The digital version means that the analog raw signal is sampled. The raw rogowski signal also has the advantage that the first derivative of the current is directly measured, and thereby compensation for inductive voltage drop can be performed directly (as was described previously). The integration is thereafter done digitally by means of the processor on IGBT measuring board 19 or offline i.e. external to the measuring board 19. A CMU system preferably comprises at each power module a Measuring Board 19. Data from each IGBT Measuring Board is preferably transmitted to a main unit 6 by means of optical fibre (EtherCat or other) or wireless (such as wifi, Bluetooth or other). Main unit 6 may communicate to outer world by EtherNet or wireless (Wifi, 3G, 4G etc). If both inverters of the converter have to be measured a similar set up is found on the second inverter. The measuring boards of the two inverters may share main unit 6 or have each their main unit 6.
    The IGBT Measuring Board 19 will preferably consist of a MCU, DSP or the like as the processing unit, as seen in figure 6. Figure 6 illustrates a generic drawing of the measuring board and main unit 6 a ccording to an embodiment of the invention. Hence if other not illustrated features or components is needed for a special connection, interface, measurement, etc. the illustrated generic structure may be changed (including removal of elements illustrated in figure 6). The main structure is as follows: 1. A processing unit which handies input measurements, process data and output raw and processed data. Exam ples of tasks for the processing unit are
    a. Analog to digital conversion of input data by means of internal A DC b. Time detection (capture) of change of comparator circuitry to detect powder module switching times, pwrn timing etc.
    c. Read/writc data to internal (inside processor) and external (on IMB PCB) RAM d. Update of ring buffers where data are stored e. Event triggerin g, typical ly triggering and stop of ring buffering and readout of data. f. Receiving triggering signal from external (through communication link) g. Generating triggering signal based on conditions in the measured/captured signals. Triggering can be based on analog values passing a threshold value, timing values passing a threshold value, processed signals passing threshold values etc. h. Receiving parameter setup i. Digital filtering of input signals j. Calculation of averages, derivati ves, integrals etc. on input signals k. Digitally calculation of current based on measurement of raw Rogowski sensor data. Resetting of calculated output current based on vce-on zero crossing (either by means of comparator signal on Vce-on or by detection zero-crossing in ADC converted values) l. Power calculation m. Temperature calculation n. Offset and gain compensation on analog data o. Digital to analog output to reference comparator circuitry p. Etc 2. RAM to store both analog and digital data. RAM may be both internally in processing unit and external. Ram can be both volatile and non-volatile 3. Analog circuitry to measure the signals described elsewhere. Examples of circuitry a. High voltage voltage division b. Non- linear circuitry for detection of low voltage transistor/diode signals (e.g. Vce-on circuitry) c. Amplifier circuitry d. Filter and integrator circuitry 4. Comparator circuitry, e.g. for detection of bridge state change, zero crossing of Vce-on signals etc. Comparator circuitry can consist of a. Analog circuitry as described in “Analog circuitry” b. Comparator circuitry to detect input signals passing a defined threshold 5. Analog multiplexer to allow more analog input signals to the ADC. The analog multiplexer properties can be a. Input data selection done by means of comparator signals. E.g. letting the analog input be selected based on bridge state so that the ADC input automatically is connected to active circui try of power module (e.g. top/bottom switch) 6. Analog to digital converter (ADC) a. Internally in processing unit b. Externally in relation to processing unit 7. Communication to main unit 6 or another central unit. The communication link can be a. Wired (electrical)
    b. Optical. E.g. EtherCAT c. Wireless, e.g. wifi, Bluetooth, zigbee or the like
    The Main unit 6 receives data from one or more IMBs. The main unit 6 may further process data. Main functions of main unit 6 may include • Data storage ® Time synchronization between IMBs ® Trigger (stop) ring buffers on IM Bs ® Data processing ® Data storage ® Communication to external system such as Scada system, user, external storage, converter or turbine control etc, o Wireless communication such as 3G, 4G, GSM etc. o EtherNet communication or other wired communication • Hardware signal to converter signal, e.g. to stop converter
    Summing up the various embodiments of the figures which can alle be impelemtend in the same embodiment of the invention. Different details of the measuring circuit 1 is illustrated on figures 1 to 4. Not alle components illustrated are necessary however the figures all served to illustrated advanteges of some of the illustrated additional components. Figure 5 iilsutrates shortly timeing in switching of the semiconductor swtich 5 and thereby the Vec-off signal. Figure 6 servses to illustrate that components of figures 1 -4 are preferably gathered at one unit such as an enclosure or PCB referred to as measuring board 19 (IMB / IGBT measuring board). The components / one more components together of the measuring board 19 may commonly and together be refered to as analog processing circuit 18. Hence the signal from the measuring circuit 1 is preferably receibved by one or the components of the analog processing ciucit 18 i.e. one of the components of the measuring board 19.
    In the same way, the main unit 6 may comprise different components for processing or storing of the data received from the measuring board 19.
    The above description is made with reference to the figures and as indicated one converter monitoring unit may be regarded as a system of several measuring boards 19 communicating with one or more main units monitoring preferably ail phases / all parallel power modules of a converter i.e. in both grid and generator side inverters. Rather specific embodiments / implementations suggestions are disclosed however within the scope of the present invention alternatives to the described may be used to obtain similar result.
    In the following measurement of Vce will be described according to an embodiment of the invention. The on-state voltage of the power module IGBTs, Yce, is according to an embodiment of the present invention m easured using the following measurement technique.
    The measuring circuit 1 may be integrated on a gate driver PCB. The on-state voltages of a power module is measured from the middle point of the IGBT half bridge to the two DC terminals.
    When one of the IGBTs is blocking the full DC voltage, the measuring circuit. 1 of that 1GBT damps at about 4.7 V. When either the IGBT or its anti-parallel diode switches to conducting state, the measuring circuit 1 is able to measure the on-state voltage with high precision.
    In an embodiment the gate driver is used merely as a Vce measuring circuit 1 and the gate drive ability is therefore unused. Due to the restrictions, it is not allowed to use the gate driver terminals as measuring points.
    Instead, the power terminals of the power module is used as the V ce measuring points. This include a parasitic resistance (R_) and inductance (L_). Vce at the top switch as is measured / calculated as follows including parasitic elements.
    If the upper switch is on and lower off, the actual measured Vce,meas is given by EQ (1) using Kirchoff s circuit law. EQ(1)
    Where rce = rceJGBT + R_,l + R_,2 and L_,term = L_,1 + L_,2 are the resistance and inductance when the IGBT is on and measuring at the terminals.
    Thus the measured Vce also depends on the inductance (L ,term) and resistance (R_,term) of the terminals which is unknown. This is a problem which needs to be addressed, because it is not possible to use the absolute values of the measured voltage and current directly to estimate the temperature of the power module by using the Vce-Ic relationship. Belov/ is an evaluation technique described which is developed to decrease the influence of the parasitic.
    The above-mentioned evaluation technique will now be described in further details. The evaluation technique is according to an embodiment of the invention done by imposing a degradation of one of the power modules in the converter test bench and monitor its electrical parameters while operating the converter. Further a method of evaluating the power module performance is also derived.
    State-of-health evaluation method
    In order to find a method of evaluating the state-of-health of a power module, it is necessary to look at the quality of the measurements. A measurement of 1c and the on-state voltage Vce of the top IGBT can be evaluated.
    Spikes occur due to noise in the Rogowski measurement at each switching instant of the monitored power module and is ignored for future analysis. As described above, the Vce measurement may clamp at 4.7 V which especially is apparent when the current is negative since the current in the top switch and diode is minimized. When the current is positive, more usable Vce measurements are available since the top switch is turned on for longer periods of time.
    By investigating the current measurement, it can be seen when phase B and C are switching state, there is a sudden change in the current rate of change, die / dt. Each time the current slope changes, a different vector is applied in the space vector modulation. The sudden change of die / dt causes the measured Vce to shift up or down correspondingly at each switching instant. The voltage shifts occur due to the parasitic inductance, La,term, between the IGBT chip and the Vce measurement points, as was discussed above. To be able to compare two samples of Vce winch are measured at instants with two different current slopes, the influence of the parasitic inductance must be removed from the Vce measurements.
    Derivation of Evaluation Parameter
    If it is assumed die / dt is a constant at every space vector, equation EQ (1) can be further simplified by differentiation as shown in EQ 2, which is solved for rce. EQ (2)
    Where dVce,meas and die are the slopes of the measured Vce and current. dVf / dt and d2Ic / dt2 become zero since Vf and die / dt are assumed to be constants.
    By using EQ (2), it is possible to get an indication of an abnormal change of the IGBT on-state characteristics by only using parameters related to the IGBT. However, rce consists of both the on-state resistance, rce,iGBx, which is dependent on the chip temperature and the parasitic resistance of the terminals, Rø,term, which is only dependent on the temperature of the terminal. If the temperature of the chip and the terminal is equal, rce,iGBi and Rø,term changes proportionally. Most likely, though, the two components have different thermal impedances to the surrounding system and thus their temperature changes differently .
    The mass of the terminals is assumed to be much larger and thereby having a larger thermal capacitance which means the thermal, response is slower than a chip which has a low thermal capacitance. This will induce a measurement failure if not Rø,term is constant, since changes in rce is not only changing due to rce,iGB'r . However, from the discussion about thermal capacitance, it is assumed in the following calculations that Rø,term will remain constant during a fundamental period.
    In the following the IGBT Measuring Board 1MB 19 will be described in more details according to an embodiment of the invention.
    The IMB is a central part of the complete Converter Monitoring Unit (CMU). According to an embodiment of the invention, for each IGBT POWER module in a converter an IMB board is connected to measure the status of and the current through the IGBTs of the power module. The numbers of IMB’s in an inverter depends of the number of power modules (a power module may comprise a plurality of power modules. As an example, 12 IMB’s will be used in one inverter. In another example, more IMB’s can be used. Remembering that a converter for a wind turbine often comprise two inverters hence if IGBTs of both inverters should be monitored by the C MU , power modules of both inverters should be equipped with IMBs
    According to an embodiment of the invention, all IMB’s in the inverter or in both inverters i.e. in the converter communicates to a central unit that will pick up and maybe also process data. With this said more than one central unit (also referred to as main unit) could be used to monitor a converter.
    It is a goal that the IMB must never cause a turbine failure. In case the IMB may fail functioning e.g, because of electronic or software malfunction or defects however it should not influence on the control of the turbine.
    To achieve this measurement functionality previous investigation has shown good functionality of using a series cubing of depletion mode mosFETs 3. This circuit gets high impedant when high voltage is applied and gets reasonable low impedant when small voltage is applied.
    Vce-off measuremen t circuit
    Is preferably designed for measuring when the Vce voltage is high.
    This voltage may only be measured on one of the IGBT of the power module and preferably measure both top Vce and bottom Vce. The Vce-off· voltage should preferably be available independent of which state the power module is in (Signal must not be multiplexed like possible for the Vce-on)
    At least two outputs are needed / preferred: 1. Direct measurement signal to Analog to Digital Converter 2, Peek detect circuit holding the maximum analog voltage value for last signal periode.
    Current leakage measurement A circuit for measure current leakage in the POWER module / IGBT may be implemented.
    The leakage current can be measures when a high voltage is applied on the IGBT transistor.
    As with other of the measuring circuits 1 of the IMB if not implemented a terminal for connecting an external measuring circuit 1 may be implemented at the IMB. Hence if the leakage measurement circuit is not implemented to such terminal an 1 Discharge circuit can be connected.
    It may also be needed to measure the leakage current in the IMB. Some of the current can be calculated because it is ohmic. But the leakage current through the Vce on clamp circuit cannot be calculated. Because of this, the clamp current should be possible to measure.
    Vce-on Zero Crossing Detection circuit
    An Vce-ον voltage zero cross detection circuit is preferably implemented to detect when the current is flowing through IGBT transistor or the avalanche diode.
    When the IGBT transistor conduct current, the Vce-ον voltage will be positive.
    When the avalanche diode conducts current, the Vce-on voltage will be negative.
    This circuit detects when the Vce on voltage is positive or negative. It is preferably designed with high speed comparator to limit the detection time delay.
    The signal is preferably routed into a time/capture input on the Microcontroller 17. IGBT Collector and emitter connections
    To be able to measure Vce voltages over the power module, all Top and Bottom terminals on the power module IGBT is preferably connected to the measuring board / measuring circuit 1.
    The invention is now descried and as mentioned the sometime detailed description should not limit the scope of protection . A CMU (m ainly m easurin g board) s hould be designed for a particular converter and the above description sometimes suffers from this. Hence if a CMU should be developed to another type of converter different connectors from IMB to power module, different specification, different current and temperature measurement sensors / principles may be used than the once described above. Further, any of the content of this documents at accompanying figures may be combined in any way to achieve even not directly disclosed embodiments of the invention.
    List 1. Measuring cricuit 2. Series connected measuring cells 3. Field-Effect Transistor 4. Control / series resistor 5. Semiconductor swtich 5A. Top semiconductor swtich 5B. Bottom semiconductor swtich 6. Main unit 7. Protection resistor 8. Zener diode 9. Blocking diode 10. Gate driver ! 1. Top Vce-on comparator 12. Bottom Vce-on comparator 13. Analog to Digital Converter 14. Multiplexer 15. Vce-off top comparator (bridge state comparator) 16. Vce-off bottom comparator (bridge state comparator) 17. Micro controller 18. Analog processing circuit 19. Intelligent measuring board 20. External control / monitoring 21. Current sensor
    权利要求:
    Claims (14)
    [1] 1. A measuring circuit (!) facilitating monitoring of a voltage of a semiconductor switch (5), the measuring circuit (1) comprises a p lurality of measuring cells 2, wherein each, of the measuring ceils 2 comprises at least one normal!y-on field-effect transistor (3), wherein each of the normaliy-on field-effect transistors (3) are controlled by a gate sign al from a control resistor (4) connected in series with the source connection of the normally-on field-effect transistor (3), and wherein a plurality of measuring cells 2 are connected in series with the first end of the series connected measuring cells 2 electrically connected to a terminal of the semiconductor switch and with the second end of the series connected measuring cells 2 electrically connected to an analoge processing circuitry.
    [2] 2. A measuring circuit (1) according to claim 1, wherein the analoge processing circuitry comprising at least one of the list comprising: operational amplifier, instrumental amplifier, analog buffer, analog filter, analog multiplexer (14), analog to ditigal converter, voltage clamp.
    [3] 3. A measuring circuit (1) according to claim 1 or 2, wherein a Zener diode (8) having a breakdown voltage lower that the blocking voltage of the normaliy-on field-effect transistor (3) is connected in parallel to the normally-on field-effect transistor (3) of the measuring cell.
    [4] 4. A measuring circuit (1) according to any of the preceding claims, wherein the normally-on field-effect transistor (3) of the measuring cell is an avalanche rated depletion mode field-effect transistor (3).
    [5] 5. A measuring circuit (1) according to any of the preceding claims, wherein, the measuring cell further comprises a protection resistor (7) connected to the gate terminal of the normally-on field-effect transistor (3).
    [6] 6. A measuring circuit (1) according to any of the preceding claims, wherein the measuring cell further comprises a diode for blocking current in the forward direction of the Zener diode (8)
    [7] 7. A measuring circuit (1) according to any of the preceding claims, wherein the normally-on field-effect transistor (3) of the measuring circuit (1) is controlled by a self-controlled gate drive circuitry comprising a control resistor (4) between the source terminal and the gate terminal of the normally-on field-effect transistor (3 ).
    [8] 8. A measuring circuit (1) according to any of the preceding claims, wherein the measuring circuit (1) further comprises an analogue to digital converter, wherein the second end of the series connected measuring cells 2 is connected to the analogue to digital converter.
    [9] 9. A measuring circuit (1) according to any of the preceding claims, wherein the measuring circuit (1) further comprises a clamping circuit limiting the input voltage of the analogue to digital converter.
    [10] 10. A measuring circuit (1) according to any of the preceding claims, wherein a current sensor (21) is measuring output current of the semiconductor switch (5).
    [11] 11. A measuring circuit (1) according to any of the preceding claims, w'herein the measuring circuit (1) can be configured as single ended or as differential mode.
    [12] 12. A measuring circuit (1) according to any of the preceding claims, wherein a top semiconductor switch and a bottom semiconductor switch is connected in a half-bridge configuration, wherein a first measuring circuit (1) is measuring the voltage over the top semiconductor switch and a second measuring circuit (1) is measuring the voltage of the bottom semiconductor switch, wherein one end of each of the first and second measuring circuits (1) are connected to a multiplexer (14), wherein the multiplexer (14) is connected to an analogue to digital converter
    [13] 13. A measuring circuit (1) according to any of the preceding claims, wherein a comparator circuit detects whether Vce-on top or Vce-on bottom is active and wherein an analog multiplexer (14) is controlled by the comparator signal.
    [14] 14. A measuring circuit (1) according to any of the preceding claims, wherein the measuring cell is implemented in a converter monitoring unit, facilitating monitoring a voltage over a top power switch and a bottom power switch of a semiconductor power switch pair, which is part of the current path through an inverter in a back-to-back converter connecting a power generating device to a public power grid.
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    同族专利:
    公开号 | 公开日
    DK179539B1|2019-02-08|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    DE10351843A1|2003-11-06|2005-06-09|Alstom|Determining temperature of power semiconductor in inverter determines load current and voltage drop if current is within given region|
    EP2753903B1|2011-09-07|2016-03-23|KK Wind Solutions A/S|Method and apparatus for estimating the temperature of a semiconductor chip|
    DE102012203165A1|2012-02-29|2013-08-29|Beuth Hochschule Für Technik Berlin|Arrangement for monitoring electrical objects e.g. thyristors, in wind-power plant, has protective device operated in block direction and blocking current flow through power source, if voltage of source is larger than voltage at terminal|
    WO2014154221A2|2013-03-27|2014-10-02|Kk-Electronic A/S|Intelligent gate drive unit|
    EP2933646A1|2014-04-17|2015-10-21|Siemens Aktiengesellschaft|Precision measurement of voltage drop across a semiconductor switching element|
    法律状态:
    2019-02-08| PME| Patent granted|Effective date: 20190208 |
    优先权:
    申请号 | 申请日 | 专利标题
    DKPA201670795|2016-10-10|
    DKPA201670795|2016-10-10|
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