![]() Output stage of a charger
专利摘要:
The invention relates to an output stage of a charger, comprising at least - a first secondary winding (2) of a transformer, - a first rectifier (4) connected to the first secondary winding (2), - a buck converter (10) connected to the output of the first rectifier (4) and having a first output capacitor (6). In order to reduce the switching losses in the switch of the buck converter and reduce the dimensions of the inductance, it is provided that the transformer has a second secondary winding (3) to which a second rectifier (11) together with the second output capacitor (12) is connected, wherein first and second output capacitor are connected in series. 公开号:AT512887A1 申请号:T50150/2012 申请日:2012-04-27 公开日:2013-11-15 发明作者: 申请人:Siemens Ag; IPC主号:
专利说明:
1 description Output stage of a charger 5 Technical area The invention relates to an output stage of a charger, comprising at least - a first secondary winding of a transformer, 10 - a first rectifier connected to the first Secondary winding is connected, - a buck converter, which is connected to the output of the first rectifier, wherein on a first output capacitor, a first output voltage can be tapped 15. A charger usually comprises an input stage, in which the supply voltage as AC voltage, such as from the AC mains or a semiconductor bridge, fed and 20 is fed to a primary winding of a transformer. The output stage of a charger includes the secondary winding of the transformer, a rectifier and a buck converter. Such chargers are used, for example, in or for batteries of an electric vehicle. 25 A buck converter (down converter) generally includes a switch, a diode, an input and output capacitor, and an inductor, such as a storage choke, as a buffer for the power. As a switch 30 is a semiconductor switch, usually a transistor, is used, which contains a power semiconductor. At the output capacitor, the output voltage can be tapped, which is a consumer or memory, just about a battery supplied. 35 State of the art Because the switching speeds of the transistors used as semiconductor switches in the buck converter (e.g., IGBT, FET, 2 SIC-FET) are getting larger, correspondingly large switching losses occur in the transistor. Basically, the larger the blocking voltage of the transistor, the greater the switching losses. For the inductance of the step-down converter, the greater the voltage at the inductance, the greater the ripple (the so-called "current ripple") of the voltage generated by the step-down converter. Presentation of the invention It is an object of the present invention to provide an output stage of a charger which reduces the intermediate circuit voltage for the clocked part of the circuit (in particular the voltage at the semiconductor switches of the step-down converter), ie for the circuit part which controls the inductance and the semiconductor switch ( eg the transistor). This relates to the circuit part which is arranged between the two capacitors in Fig. 1. As a result, the switching losses in the switch of the buck converter could be reduced and the dimensions of the inductance can be reduced. This object is achieved by an output stage having the features of patent claim 1. Advantageous embodiments of the invention are defined in the respective dependent claims. According to claim 1 it is provided that the transformer of the output stage has a second secondary winding, to which a second rectifier, including the second output capacitor is connected, wherein the first and second output capacitor are connected in series. The output voltage for the load to be charged can be taken from the series connection of the two output capacitors. This allows the voltage at the first output capacitor and thus in the buck converter - compared to output stages with only one output capacitor. 3 - be reduced to provide the same voltage for the consumer. One possible embodiment of the invention relates to the fact that a plurality of cascaded buck converters are provided. These cascaded buck converters are driven in antiphase in a known manner. As a result, a significant reduction of the ripple current is achieved. If first and second secondary windings are designed such that the second secondary winding supplies less voltage than the first secondary winding, then it is ensured that an unregulated basic voltage is provided by the second secondary winding and the second rectifier, which is smaller than the regulated one Voltage generated by the first secondary winding, the first rectifier and the buck converter. The ratio of the windings and thus the voltages of the first and second secondary windings can be selected approximately the same design 20 so that the second secondary winding has fewer windings than the first secondary winding. It is advantageous if the ratio of the voltages of the first and second secondary windings are matched to the memory to be charged. For this purpose, it may be provided that the second secondary winding is formed so that it provides a base voltage that corresponds to a minimum allowable voltage of the memory to be charged and the first secondary winding provides an additional voltage 30, which sets the base voltage to one for the charging memory desired voltage supplements. The memory to be charged may be about a battery, such as the battery of an electric vehicle. 35 Accordingly, a combination of an output stage of a charger and a memory of the invention 4, wherein the memory is connected to the output stage according to the invention such that it taps the sum of the voltages of the two output capacitors. Due to the inventive design of the output stage, the reverse voltage of the transistors and the diodes can be reduced, whereby less switching losses occur. And it can the dimensions of the inductance of the buck converter (the buck converter inductor) are reduced while maintaining the switching frequency. Brief description of the figures To further explain the invention, reference is made in the following part of the description to the schematic figures, from the further advantageous embodiments, details and further developments of the invention can be found. Show it: 1 shows an output stage according to the prior art with a step down converter, FIG. 2 shows an output stage according to the invention with a step-down divider, 3 shows an output stage according to the prior art with two cascaded buck converters, FIG. FIG. 4 shows an output stage according to the invention with two cascaded buck converters. Embodiment of the invention In Fig. 1, an output stage of a charger according to the prior art is shown. It comprises the first and here only secondary winding 2 of a transformer, of which the primary winding 1 is located. The secondary winding 2 is connected to the first and here single rectifier 4, which supplies the buck converter 10 with voltage. This consists of an input capacitor 5, 5 201128837 an output capacitor 6, a transistor 7, an inductance 8 and a diode 9. The output capacitor 6 provides the output voltage at the terminals leftmost, which is used for loading a memory. According to the circuit of FIG. 1 is now supplemented by a second secondary winding 3 of the transformer and a second rectifier 11, which also provides a portion of the total output voltage via a second output capacitor 12. The total output voltage is composed of the sum of the output voltages from the output capacitor 6 of the buck converter 10 and the second output capacitor 12. For example, if the memory to be charged is a battery and requires a minimum battery voltage of 200V, it is not necessary to control the total output voltage below 200V. Therefore, the second secondary winding 3 is dimensioned so that the second output capacitor 12, an unregulated base voltage of 200 V is applied, while the first secondary winding is dimensioned so that with the buck converter 10 only a share of 300 V must be effectively controlled. Overall, then the battery is then provided an entire output voltage of 500 V available. In Fig. 3, a further output stage according to the prior art is shown, which can be improved according to FIG. FIG. 3 differs from FIG. 1 in that a further step-down converter is provided which is arranged in cascade with respect to the step-down converter 10 from FIG. 1 and comprises a further inductor 13, a further transistor 14 and a further diode 15. The further step-down converter shares with the step-down converter 10 the input capacitor 5 and the output capacitor 6. 6 2, this circuit is supplemented, as in FIG. 2, by a second secondary winding 3 of the transformer and by a second rectifier 11 and a second output capacitor 12. In principle, the circuit according to the invention - for purposes other than chargers - also conceivable with boost converters, ie by the buck converters are replaced by boost converter. List of Reference Signs: 1 primary winding of the transformer 2 first secondary winding of the transformer 3 second secondary winding of the transformer # 4 first rectifier 5 input capacitor of the step-down converter 6 first output capacitor of the step-down converter 7 transistor 8 inductance 9 diode 10 step-down converter 11 second rectifier 12 second output capacitor 13 further inductance 14 further transistor 15 another diode
权利要求:
Claims (5) [1] 7 output stage of a charger, comprising at least - a first secondary winding (2) of a transformer, 5 - a first rectifier (4) which is connected to the first secondary winding (2), - a buck converter (10) connected to the Output of the first rectifier (4) is connected and has a first output capacitor (6), characterized in that the transformer has a second secondary winding (3) to which a second rectifier (11) together with the second output capacitor (12) is connected, wherein first and second output capacitors are connected in series. [2] Second output stage according to claim 1, characterized in that a plurality of cascaded buck converters (10; 13, 14, 15) are provided. [3] 3. output stage according to claim 1 or 2, characterized in that first and second secondary windings 20 are formed so that the second secondary winding (3) delivers less voltage than the first secondary winding (2). [4] 4. output stage according to one of claims 1 to 3, characterized in that the second secondary winding (3) is so formed 25 that this is a fundamental voltage for 8 provides that corresponds to a minimum allowable voltage of the memory to be charged and the first secondary winding (2) provides an additional voltage available, which supplements the base voltage to a desired voltage for the memory to be loaded 5. [5] 5. output stage of a charger with memory, wherein the output stage is designed according to one of claims 1 to 4 and the memory is connected to the output stage, that it taps the sum of the voltages of the two 10 output capacitors {6, 12).
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同族专利:
公开号 | 公开日 AT512887B1|2014-03-15| EP2842222B1|2017-12-13| US9614388B2|2017-04-04| EP2842222A1|2015-03-04| US20150102766A1|2015-04-16| CN104247242B|2018-03-30| CN104247242A|2014-12-24| WO2013160157A1|2013-10-31|
引用文献:
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法律状态:
2017-12-15| MM01| Lapse because of not paying annual fees|Effective date: 20170427 |
优先权:
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申请号 | 申请日 | 专利标题 ATA50150/2012A|AT512887B1|2012-04-27|2012-04-27|Output stage of a charger|ATA50150/2012A| AT512887B1|2012-04-27|2012-04-27|Output stage of a charger| CN201380022116.9A| CN104247242B|2012-04-27|2013-04-16|The output stage of charging equipment| US14/397,004| US9614388B2|2012-04-27|2013-04-16|Output stage of a charging device, including a transformer, rectifier, converter, capacitor, storage device and a use thereof| PCT/EP2013/057930| WO2013160157A1|2012-04-27|2013-04-16|Output stage of a charging device| EP13717267.2A| EP2842222B1|2012-04-27|2013-04-16|Output stage of a charging device| 相关专利
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